A 1.5V CMOS Transconductor using adaptive biasing and its application

Abstract

Abstract A low-voltage CMOS transconductor is designed in 0.35µm standard CMOS technology. The proposed circuit uses adaptive biasing linearization method to achieve better linearity in low voltage applications. Simulation results using HSPICE show a total harmonic distortion of -71 dB at 1.25 MHz for a 400 mV peak to peak input voltage. The total power consumption is only 45 µW with 1.5 V power supply. The circuit can be used in the implementation of membership functions or fuzzifiers in analogue and mixed-signal neuro-fuzzy systems