Implicit transactional memory in chip multiprocessors

Chip Multiprocessors (CMPs) are an efficient way of designing and use the huge amount of transistors on a chip. Different cores on a chip can compose a shared memory system with a very low-latency interconnect at a very low cost. Unfortunately, consistency models and synchronization styles of popular programming models for multiprocessors impose severe performance losses. Known architectural approaches to combat these losses are too complex, too specialized, or not transparent to the software. In this article, we introduce “implicit transactional memory” as a generalized architectural concept to remove such performance losses. We show how the concept of implicit transactions can be implemented at a low complexity by leveraging the multi-checkpoint mechanism of the Kilo-Instruction Processor. By relying on a general speculation substrate, it supports even the strictest consistency model – sequential consistency – potentially as effectively as weaker models and it allows multiple threads to speculatively execute critical sections, beyond barriers and event synchronizations.Postprint (published version

Implicit transactional memory in kilo-instruction multiprocessors

Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of combining a number of such multi-core chips into a system. The widespread use of multiprocessor systems will make performance losses due to consistency models and synchronization styles of popular programming models even more evident than they already are. Known architectural approaches to combat these losses are generally too complex, too specialized, or not transparent to software. In this article, we introduce implicit transactional memory as a generalized architectural concept to remove unnecessary performance losses caused by consistency models and synchronization styles. We show how the concept of implicit transactions can be implemented with low complexity by leveraging the multi-checkpoint mechanism of the Kilo-Instruction Processor. By relying on a general speculation substrate, this method supports even the strictest consistency model – sequential consistency – potentially as effectively as weaker models and it allows multiple threads to speculatively execute critical sections, beyond barriers and event synchronizations.Postprint (published version

A trust approach to the financial performance of information and communications technology enterprises

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Use of Newly Acquired Materials: An Analysis of Print and E-book Acquisitions

The Auburn University at Montgomery (AUM) Library examined its current acquisitions circulation rate over a period of five years (from 2017-2021) to determine whether materials being added met student and faculty needs as demonstrated by circulation patterns, and if there was a difference in circulation patterns between acquired print and e-books that might help the library determine where to better focus its resources: print or electronic

New usage reports, new insights! How to use your COUNTER data in decision making processes

Librarians have been receiving COUNTER Release 5 reports since February 2019 and are becoming familiar with the new robust usage data. In this paper three experts explain how the new usage reports provide greater clarity and how they give insight into users’ actions. Athena Hoeppner outlines the new reports and metrics and explains how to interpret book usage data and how to use the data effectively in decision making process. Sonja Lendi focuses on journal usage data and the differences between Release 4 and Release 5 of the COUNTER Code of Practice. She also explains Distributed Usage Logging (DUL). This protocol enables publishers to capture traditional usage activity related to their content that happens on sites other than their own so they can provide reports of “total usage” regardless of where that usage happens. Kornelia Junge explains how librarians can use Microsoft Excel to analyse usage

Examining the presence of balloons in Turkey's house prices

Financial bubbles have a significant effect on economic indicators. Bubbles in the housing market may herald the existence of financial crises, especially those arising from the housing market. In this study, it was aimed to test the existence of bubbles in housing price formations by considering the housing price index of Turkey in general and the housing price index of 26 sub- provinces/regions, including Turkey's three big cities. For this purpose, the existence of bubbles in housing prices were examined using the monthly frequency data of 27 housing price indexes for the 2010M1 – 2022M3 periods, with the methods of the Sup-Augmented Dickey Fuller and Generalized Sup-Augmented Dickey Fuller methods and then the periods of the bubbles determined form each province/region were expressed. In the findings obtained, the presence of undeflated balloons was determined in Turkey in general and in all 26 sub-provinces/regions. Considering the economic risks that balloons indicate, it is clear that necesserity of constantly controlled with regulations both of the housing market and the financial markets associated with the housing market. It is thought that the study will contribute to the literature in terms of handling the period including the COVID-19 pandemic process, using real housing prices, and comprehensively examining the existence of bubbles for both Turkey in general and all sub-regions of Turkey

Implicit transactional memory in chip multiprocessors

Chip Multiprocessors (CMPs) are an efficient way of designing and use the huge amount of transistors on a chip. Different cores on a chip can compose a shared memory system with a very low-latency interconnect at a very low cost. Unfortunately, consistency models and synchronization styles of popular programming models for multiprocessors impose severe performance losses. Known architectural approaches to combat these losses are too complex, too specialized, or not transparent to the software. In this article, we introduce “implicit transactional memory” as a generalized architectural concept to remove such performance losses. We show how the concept of implicit transactions can be implemented at a low complexity by leveraging the multi-checkpoint mechanism of the Kilo-Instruction Processor. By relying on a general speculation substrate, it supports even the strictest consistency model – sequential consistency – potentially as effectively as weaker models and it allows multiple threads to speculatively execute critical sections, beyond barriers and event synchronizations.Postprint (published version