Upgrade of the ALICE Inner Tracking System

The Inner Tracking System (ITS) is the key ALICE detector for the study of heavy flavour production at LHC. Heavy flavor can be studied via the identification of short-lived hadrons containing heavy quarks which have a mean proper decay length in the order of 100-300 $\mu$m. To accomplish this task, the ITS is composed of six cylindrical layers of silicon detectors (two pixel, two drift and two strip) with a radial coverage from 3.9 to 43 cm and a material budget of 1.1% X0 per layer. %In particular, the properties of the two innermost layers define the ITS performance in measuring the displaced vertex of such short-lived particles. In order to enhance the ALICE physics capabilities, and, in particular, the tracking performance for heavy-flavour detection, the possibility of an ITS upgrade has been studied in great detail. It will make use of the spectacular progress made in the field of imaging sensors over the last ten years as well as the possibility to install a smaller radius beampipe. The upgraded detector will have greatly improved features in terms of: the impact parameter resolution, standalone tracking efficiency at low $p_{t}$, momentum resolution and readout capabilities. The Conceptual Design Report, which covers the design and performance requirements, the upgrade options, as well as the necessary R&D efforts, was made public in September 2012. An intensive R&D program has been launched to review the different technological options under consideration. The new detector should be ready to be installed during the long LHC shutdown period scheduled in 2017-2018.Comment: 6 pages, 9 figures PIXEL2012 - International Workshop on Semiconductor Pixel Detectors for Particles and Imagin

Characterisation of AMS H35 HV-CMOS monolithic active pixel sensor prototypes for HEP applications

Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut f\"ur Technologie (KIT), Institut de F\'isica d'Altes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$\Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V

HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results

In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given

Active Pixel Sensors in ams H18/H35 HV-CMOS Technology for the ATLAS HL-LHC Upgrade

Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement amplifier and discriminator stages directly in insulating deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150V leading to a depletion depth of several 10um. Prototype sensors in the ams H18 180nm and H35 350nm HV-CMOS processes have been manufactured, acting as a potential drop-in replacement for the current ATLAS Pixel sensors, thus leaving higher level processing such as trigger handling to dedicated read-out chips. Sensors were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiation with X-rays and protons revealed a tolerance to ionizing doses of 1Grad. An enlarged depletion zone of up to 100um thickness after irradiation due to the acceptor removal effect was deduced from Edge-TCT studies. The sensors showed high detection efficiencies after neutron irradiation to 1e15 n_eq cm-2 in testbeam experiments. A full reticle size demonstrator chip, implemented in the H35 process is being submitted to prove the large scale feasibility of the HV-CMOS concept.Comment: 6 pages, 12 figures, proceeding contribution to the 10th International Hiroshima Symposium 2016, submitted to NIM

Introduction to Security Onion

Security Onion is a Network Security Manager (NSM) platform that provides multiple Intrusion Detection Systems (IDS) including Host IDS (HIDS) and Network IDS (NIDS). Many types of data can be acquired using Security Onion for analysis. This includes data related to: Host, Network, Session, Asset, Alert and Protocols. Security Onion can be implemented as a standalone deployment with server and sensor included or with a master server and multiple sensors allowing for the system to be scaled as required. Many interfaces and tools are available for management of the system and analysis of data such as Sguil, Snorby, Squert and Enterprise Log Search and Archive (ELSA). These interfaces can be used for analysis of alerts and captured events and then can be further exported for analysis in Network Forensic Analysis Tools (NFAT) such as NetworkMiner, CapME or Xplico. The Security Onion platform also provides various methods of management such as Secure SHell (SSH) for management of server and sensors and Web client remote access. All of this with the ability to replay and analyse example malicious traffic makes the Security Onion a suitable low cost alternative for Network Security Management. In this paper, we have a feature and functionality review for the Security Onion in terms of: types of data, configuration, interface, tools and system management

Cuff-Less Methods for Blood Pressure Telemonitoring.

Blood pressure telemonitoring (BPT) is a telemedicine strategy that uses a patient\u27s self-measured blood pressure (BP) and transmits this information to healthcare providers, typically over the internet. BPT has been shown to improve BP control compared to usual care without remote monitoring. Traditionally, a cuff-based monitor with data communication capabilities has been used for BPT; however, cuff-based measurements are inconvenient and cause discomfort, which has prevented the widespread use of cuff-based monitors for BPT. The development of new technologies which allow for remote BP monitoring without the use of a cuff may aid in more extensive adoption of BPT. This would enhance patient autonomy while providing physicians with a more complete picture of their patient\u27s BP profile, potentially leading to improved BP control and better long-term clinical outcomes. This mini-review article aims to: (1) describe the fundamentals of current techniques in cuff-less BP measurement; (2) present examples of commercially available cuff-less technologies for BPT; (3) outline challenges with current methodologies; and (4) describe potential future directions in cuff-less BPT development