Digital Offset Calibration of an OPAMP Towards Improving Static Parameters of 90 nm CMOS DAC

In this paper, an on-chip self-calibrated 8-bit R-2R digital-to-analog converter (DAC) based on digitally compensated input offset of the operational amplifier (OPAMP) is presented. To improve the overall DAC performance, a digital offset cancellation method was used to compensate deviations in the input offset voltage of the OPAMP caused by process variations. The whole DAC as well as offset compensation circuitry were designed in a standard 90 nm CMOS process. The achieved results show that after the self-calibration process, the improvement of 48% in the value of DAC offset error is achieved

A low-offset low-voltage CMOS Op Amp with rail-to-rail input and output ranges

A low voltage CMOS op amp is presented. The circuit uses complementary input pairs to achieve a rail-to-rail common mode input voltage range. Special attention has been given to the reduction of the op amp's systematic offset voltage. Gain boost amplifiers are connected in a special way to provide not only an increase of the low-frequency open-loop gain but also a significant reduction of the systematic offset voltag

Determination of energy barrier profiles for high-k dielectric materials utilizing bias-dependent internal photoemission

We utilize bias-dependent internal photoemission spectroscopy to determine the metal/dielectric/silicon energy barrier profiles for Au/HfO2/Si and Au/Al2O3/Si structures. The results indicate that the applied voltage plays a large role in determining the effective barrier height and we attribute much of the variation in this case to image potential barrier lowering in measurements of single layers. By measuring current at both positive and negative voltages, we are able to measure the band offsets from Si and also to determine the flatband voltage and the barrier asymmetry at 0 V. Our SiO2 calibration sample yielded a conduction band offset value of 3.03+/-0.1 eV. Measurements on HfO2 give a conduction band offset value of 2.7+/-0.2 eV (at 1.0 V) and Al2O3 gives an offset of 3.3+/-0.1 (at 1.0 V). We believe that interfacial SiO2 layers may dominate the electron transport from silicon for these films. The Au/HfO2 barrier height was found to be 3.6+/-0.1 eV while the Au/Al2O3 barrier is 3.5+/-0.1 eV

Improved chopper circuit uses parallel transistors

Parallel transistor chopper circuit operates with one transistor in the forward mode and the other in the inverse mode. By using this method, it acts as a single, symmetrical, bidirectional transistor, and reduces and stabilizes the offset voltage

Electrical determination of the valence-band discontinuity in HgTe-CdTe heterojunctions

Current-voltage behavior is studied experimentally in a Hg0.78Cd0.22Te-CdTe-Hg0.78Cd0.22Te heterostructure grown by molecular beam epitaxy. At temperatures above 160 K, energy-band diagrams suggest that the dominant low-bias current is thermionic hole emission across the CdTe barrier layer. This interpretation yields a direct determination of 390±75 meV for the HgTe-CdTe valence-band discontinuity at 300 K. Similar analyses of current-voltage data taken at 190–300 K suggest that the valence-band offset decreases at low temperatures in this heterojunction

Active power losses distribution methods for the modular multilevel converter

Modular Converters such as the MMC have become the new standard in VSC-HVDC applications. Their modularity has brought many industrial advantages but also increased the complexity of their operation. This paper looks at how a range of techniques may alter the balance of power losses between the IGBT modules. These techniques are based on circulating currents at the (i) fundamental frequency and (ii) second harmonic and (iii) DC voltage offset on the converter voltage waveform. Finally, conclusions on the effectiveness and potential drawbacks of these techniques are discussed

Apparatus for providing a servo drive signal in a high-speed stepping interferometer

An analog voltage approximately linearly proportional to a desired offset from the present null position of a moving mirror in an interferometer is applied to the mirror moving means. As the mirror moves to the next null position, as determined by the analog voltage, the fringes of a laser reference interference pattern are detected. At the occurrence of each fringe the analog voltage is reduced proportionally so that when the next null position is reached, this driving analog is effectively zero. A binary up/down counter, by its internal count, causes a digital/analog converter to supply the analog voltage to the mirror moving means. Fringe detection and direction of movement logic cause the binary up/down counter to be decremented from its offset count as the mirror is moved to the new null position. Undesirable movement of the mirror due to vibration or other sources causes a correcting drive signal to be applied to the mirror moving means that is proportional to the distance of movement