Etude d'amplificateurs faible niveau à haute linéarité en technologies intégrées HEMT AsGa pour applications spatiales

This work presents an analysis of low-level and high linearity amplifier circuits, and proposes solutions in order to optimise the ratio between high linearity and low consumption (IP3/Pdc). Different methods to evaluate linearity in amplifier has been studied. Mathematical analysis with Volterra series based on equivalent circuit of HEMT transistor allows us to highlight different parameters influencing linearity in low amplifier, in particular, bias point and load impedances. Hence, linearity optimisation does not involve optimisation of output power at 1 dB gain compression, as for high power amplifier, but optimisation of load of transistor for the last stage, using data from 2 tones load-pull measurement, in order to maximise the C/I3 ratio for a given output power. This approach allow us to bypass the lack of reliable non-linear model of transistor for an accurate IM3 prediction, and help to optimise the linearity using a simple, fast and robust linear simulation.LIMOGES-BU Sciences (870852109) / SudocSudocFranceF

Low level and high linearity amplifiers in integrated technology for satellite receivers : linearisation techniques and issues.

International audienceBased on carrier to third intermodulation ratio (C/I3), reverse engineering of a two stages low level amplifier has been made in order to access the current transistor nonlinear models. Comparisons between two models of HEMT have been performed in order to choose the one which represent accurately weak nonlinearities at low level power dynamic range. By judicious choice of bias point, 12 dB improvement of linearity has been achieved. Other issues of linearization techniques have been studied so that to be suitable for MMIC implementation

Méthodologie de conception d'amplificateurs faible niveau à haute linéarité en technologie MMIC pour récepteur satellite

National audienc