The design of Low-Voltage Low-Power Analog Integrated Circuits and their Applications in Hearing Instruments

Electrical Engineering, Mathematics and Computer Scienc

Structured electronic design of high-pass ΣΔ converters and their application to cardiac signal acquisition

Achieving an accurate sub-Hz high-pass (HP) cutoff frequency and simultaneously a high accuracy of the transfer function is a challenge in the implementation of analog-to-digital converters for biomedical ExG signals. A structured electronic design approach based on state-space forms is proposed to develop HPΣΔ modulators targeting high accuracy of the HP cutoff frequency and good linearity. Intermediate transfer functions are mathematically evaluated to compare the proposed HPΣΔ topologies with respect to dynamic range. Finally, to illustrate the design method, an orthonormal HPΣΔ modulator is designed to be implemented in 0.18 μm technology which achieves a linearity of 12-bits.Accepted author manuscriptBio-Electronic

Ultra-low-power, class-AB, CMOS four-quadrant current multiplier

A class-AB four-quadrant current multiplier constituted by a class-AB current amplifier and a current splitter which can handle input signals in excess of ten times the bias current is presented. The proposed circuit operation is based on the exponential characteristic of BJTs or subthreshold MOSFETs. The multiplier is designed using the latter devices and achieves very low power consumption. Simulation results show that from a 0.65 V supply, the proposed circuit consumes 12.4 nW static power while less than 30 dB total harmonic distortion is achieved for an input modulation index up to 10.Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc

Passief RF-filter

Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc

Realizing flexible bioelectronic medicines for accessing the peripheral nerves: Technology considerations

Patients suffering from conditions such as paralysis, diabetes or rheumatoid arthritis could in the future be treated in a personalised manner using bioelectronic medicines (BEms) (Nat Rev Drug Discov 13:399–400, 2013, Proc Natl Acad Sci USA 113:8284–9, 2016, J Intern Med 282:37–45, 2017). To deliver this personalised therapy based on electricity, BEms need to target various sites in the human body and operate in a closed-loop manner. The specificconditions and anatomy of the targeted sites pose unique challenges in the development of BEms. With a focus on BEms based on flexible substrates for accessing small peripheral nerves, this paper discusses several system-leveltechnology considerations related to the development of such devices. The focus is mainly on miniaturisation and long-term operation. We present an overview of common substrate and electrode materials, related processing methods, and discuss assembly, miniaturisation and long-term stability issues.Bio-Electronic

Energy efficient sampling and conversion of bio-signals using time-mode circuits

With the continuous developments in science and engineering, specifically in the fields of electronics and manufacturing, implantable electronic devices have become a reality during the last decades. Implantable electronic devices have hard design constraints: 1) As small size as possible to reduce tissue damage, 2) Minimum heat generation to protect the surrounding tissue, and 3) Minimum energy dissipation as these devices are mostly operated using a small battery or wireless power transfer. The advancement and scaling of CMOS technologies has always been based on improving the performance of digital systems. With each new technology node, the threshold voltages of the available MOS transistors and the supply voltage of the process node is scaled as well. Scaling of the supply voltage reduces the headroom that is available to the transistors for operating in the region. Even though reducing the supply voltage reduces the energy dissipation, without transistors operating in the saturation region, it is very hard to realize signal processing and amplification functions in the analogue domain. To address the mentioned hard constraints of implantable electronic device design, we propose time-mode circuits for energy efficient sampling and conversion of bio-signals in advanced process technologies. The types of circuits we are proposing benefit both from voltage scaling and smaller size of advanced process nodes while being able to process digital signals with analogue accuracy, i.e., time-mode circuits represent an analogue signal by the time difference between two binary switching events. For example, when compared to standard digital CMOS circuit operation, to transfer N bits of data in parallel, the number of switchings required may change from 0 to N in standard CMOS, while it always takes timemode circuits two switching if the rising and falling edges of a pulse is used for signal representation. Based on these observations, we designed a bio-signal sampling and conversion system that consists of an analogue-to-time converter (ATC) followed by an asynchronous time-to-digital converter (A-TDC). The ATC converts the sampled bio-signal to a time-pulse with a high analogue-to-time conversion gain, and the A-TDC resolves this generated pulse to a digital value, completing the sampling and conversion process. We will present the design process and simulation results of such an implementation that operates with a supply voltage of 0.6V in a standard 0.18um process.Bio-Electronic

A Switched Capacitor DC-DC Buck Converter for a Wide Input Voltage Range

In this paper, a power-efficient multiphase Recursive Switched Capacitor (RSC) converter is presented. Conventionally, RSC converters are used to obtain many different output voltages from a fixed input voltage. Here, the converter provides a fixed output voltage of 1 V at 1 mA from an input voltage ranging from 1.4 V to 4.5 V. It has one programmable stage (2:1 or 3:2) followed by four 2:1 stages. Contrary to most conventional topologies, depending on the input voltage, not all the stages are always deployed. This allows to increase the power efficiency of the whole architecture. The flying capacitance of the non-activated stages is transferred to the activated ones. Hence, for any given input voltage, 100 % of the on-chip capacitance is always used for the conversion. For a general 2:1 topology, an analytical analysis of the power losses is carried out and the impact of the overdrive voltage of the switches on the power efficiency is quantified.A novel gate-driver technique for the switches involved in the conversion is proposed. It ensures an optimal overdrive voltage of the transistor, irrespective of its source and drain potentials. The 16-phase interleaved converter employs a charge recycling technique and uses a total on-chip capacitance of 3 nF.The RSC converter is designed to be implemented in a standard 40 nm CMOS process which offers a capacitor density of approximately 2 nF/mm^2. Circuit simulations over the whole input voltage range show a power efficiency never lower than 54 % with a peak value of 92.7 %.Bio-Electronic

Does a coupling capacitor enhance the charge balance during neural stimulation? An empirical study

Due to their DC-blocking characteristic, coupling capacitors are widely used to prevent potentially harmful charge buildup at the electrode–tissue interface. Although the capacitors can be an effective safety measure, it often seems overlooked that coupling capacitors actually introduce an offset voltage over the electrode–tissue interface as well. This work investigates this offset voltage both analytically and experimentally. The calculations as well as the experiments using bipolar-driven platinum electrodes in a saline solution confirm that coupling capacitors introduce an offset, while they barely contribute to the passive charge balancing. In particular cases, this offset is shown to reach potentially dangerous voltage levels that could induce irreversible electrochemical reactions. This work therefore suggests that when the use of coupling capacitors is required, the offset voltage should be analyzed for all operating conditions to ensure it remains within safe boundaries.MicroelectronicsElectrical Engineering, Mathematics and Computer Scienc

High-Pass ΣΔ Converter Design Using a State-Space Approach and Its Application to Cardiac Signal Acquisition

Cardiac signal acquisition with high linearity and accuracy of the high-pass cut-off frequency imposes a challenge on the implementation of the analog preprocessing and the analog-to-digital converter. This paper describes a state-space-based methodology for designing high-pass sigma-delta (HP Sigma \Delta topologies with high linearity, targeting high accuracy of the high-pass cut-off frequency. Intermediate functions are evaluated mathematically to compare the proposed HP \Sigma \Delta topologies with respect to dynamic range. A sensitivity performance analysis of the noise transfer function with respect to integrator nonidealities and coefficient variations is also described. Finally, to illustrate the design approach, an orthonormal HP \Sigma \Delta modulator is designed to be implemented in 0.18 \mum CMOS technology, is tested with real prerecorded ECG signals.Accepted author manuscriptBio-Electronic

An RF Energy Harvester with MPPT Operating Across a Wide Range of Available Input Power

In this paper we present the design and simulation results of an RF energy harvesting circuit that operates across a wide range of available input power, from -27 dBm to 6 dBm. The system comprises an adaptive impedance matching network, a single-stage cross-connected differential rectifier, a start-up charge pump, an adaptive buck-boost converter and a Maximum Power Point Tracking (MPPT) circuit. The MPPT circuit controls the switching frequency of the buck-boost converter and configures the impedance matching network, optimizing the interfaces between the rectifier and antenna and between the rectifier and the storage capacitor, thereby guaranteeing that maximum power is being harvested. The system is designed in a standard 0.18 pm CMOS technology. The peak efficiency is 49.1% at an available input power of -18 dBm and signal frequency of 403.5 MHz.Accepted author manuscriptBio-Electronic