150 research outputs found
N.C. Rana: The Life of a `Comet' in the Astrophysical World
Narayan Chandra Rana, a person with extraordinary potential from a remote
village of Bengal, India, came into the limelight of the international
scientific world through his exceptional talent, zeal and courage. In his very
short life-span, he excelled not only into various branches of astrophysics,
but also took a leading role in science popularization, text book writing etc.
In this paper, life and works of that budding scientist of India have been
discussed from multifarious viewpoints.Comment: 24 pages, 18 figure
Searching for a Solution to the Age Problem of the Universe
We present here a phenomenological cosmological model under perfect fluid
distribution with a stiff equation of state . The erstwhile
cosmological constant is assumed to be a time dependent variable, i.e.,
in our study. It has been shown that the estimates of
different cosmological parameters from this model are in good agreement with
the experimental results, especially 13.79 Gyr as the age of the universe is
quite satisfactory. The behavior and relation of -stiff fluid model
with dust, viscous fluid and variable have also been investigated in
detail.Comment: 5 LaTex pages, considerable changes in the text and also addition of
new references. Accepted for publication in Gravitation and Cosmolog
Dark Energy Models With Variable Equation Of State Parameter
Two variable models, viz. and have been studied under the assumption that the equation of state
parameter is a function of time. The selected models are
found to be equivalent both in four and five dimensions. The possibility of
signature flip of the deceleration parameter is also shown.Comment: 15 Latex pages, a few changes in the text. Accepted in IJMP
Memory Slices: A Modular Building Block for Scalable, Intelligent Memory Systems
While reduction in feature size makes computation cheaper in terms of
latency, area, and power consumption, performance of emerging data-intensive
applications is determined by data movement. These trends have introduced the
concept of scalability as reaching a desirable performance per unit cost by
using as few number of units as possible. Many proposals have moved compute
closer to the memory. However, these efforts ignored maintaining a balance
between bandwidth and compute rate of an architecture, with those of
applications, which is a key principle in designing scalable large systems.
This paper proposes the use of memory slices, a modular building block for
scalable memory systems integrated with compute, in which performance scales
with memory size (and volume of data). The slice architecture utilizes a
programmable memory interface feeding a systolic compute engine with high reuse
rate. The modularity feature of slice-based systems is exploited with a
partitioning and data mapping strategy across allocated memory slices where
training performance scales with the data size. These features enable shifting
the most pressure to cheap compute units rather than expensive memory accesses
or transfers via interconnection network. An application of the memory slices
to a scale-out memory system is accelerating the training of recurrent,
convolutional, and hybrid neural networks (RNNs and RNNs+CNN) that are forming
cloud workloads. The results of our cycle-level simulations show that memory
slices exhibits a superlinear speedup when the number of slices increases.
Furthermore, memory slices improve power efficiency to 747 GFLOPs/J for
training LSTMs. While our current evaluation uses memory slices with 3D
packaging, a major value is that slices can also be constructed with a variety
of packaging options, for example with DDR-based memory units
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
In nanometer scaled CMOS devices significant increase in the subthreshold,
the gate and the reverse biased junction band-to-band-tunneling (BTBT) leakage,
results in the large increase of total leakage power in a logic circuit.
Leakage components interact with each other in device level (through device
geometry, doping profile) and also in the circuit level (through node
voltages). Due to the circuit level interaction of the different leakage
components, the leakage of a logic gate strongly depends on the circuit
topology i.e. number and nature of the other logic gates connected to its input
and output. In this paper, for the first time, we have analyzed loading effect
on leakage and proposed a method to accurately estimate the total leakage in a
logic circuit, from its logic level description considering the impact of
loading and transistor stacking.Comment: Submitted on behalf of EDAA (http://www.edaa.com/
Indian Amateur Astronomer R. G. Chandra: A unique AAVSO member
In this Note, which is a sequel on the Indian amateur astronomer R.G. Chandra
[Biswas2011a, Biswas2011b], we have presented some documents to reveal his
three-decades relationship with the American Association for Variable Stars
Observers and other connection to American astronomical societies. We have
given a short account of his observations on different category, viz. (i)
Variable stars, (ii) Nova, (iii) Meteors and (iv) Andromedae. His
responsibilities and recognitions are also discussed.Comment: 16 pages, 1 figure and 5 table
Large Number Hypothesis: A Review
Large dimensionless numbers, arising out of ratios of various physical
constants, intrigued many scientists, especially Dirac. Relying on the
coincidence of large numbers, Dirac arrived at the revolutionary hypothesis
that the gravitational constant should vary inversely as the cosmic time
. This hypothesis of Dirac, known as Large Number Hypothesis (LNH), sparked
off many speculations, arguments and new ideas in terms of applications. Works
done by several authors with LNH as their basic platform are reviewed in this
work. Relationship between some of those works are pointed out here.
Possibility of time-variations of physical constants other than are also
discussed.Comment: 21 pages Latex, 0 figures, submitted to GR
Cascade Adversarial Machine Learning Regularized with a Unified Embedding
Injecting adversarial examples during training, known as adversarial
training, can improve robustness against one-step attacks, but not for unknown
iterative attacks. To address this challenge, we first show iteratively
generated adversarial images easily transfer between networks trained with the
same strategy. Inspired by this observation, we propose cascade adversarial
training, which transfers the knowledge of the end results of adversarial
training. We train a network from scratch by injecting iteratively generated
adversarial images crafted from already defended networks in addition to
one-step adversarial images from the network being trained. We also propose to
utilize embedding space for both classification and low-level (pixel-level)
similarity learning to ignore unknown pixel level perturbation. During
training, we inject adversarial images without replacing their corresponding
clean images and penalize the distance between the two embeddings (clean and
adversarial). Experimental results show that cascade adversarial training
together with our proposed low-level similarity learning efficiently enhances
the robustness against iterative attacks, but at the expense of decreased
robustness against one-step attacks. We show that combining those two
techniques can also improve robustness under the worst case black box attack
scenario.Comment: 16 pages, 9 figures, International Conference on Learning
Representations (ICLR) 201
A Note On Astronomer R. G. Chandra and British Astronomical Association
In the present Note we have presented some documents to reveal the
longstanding relationship of Indian amateur astronomer R. G. Chandra with
British Astronomical Association.Comment: 8 Latex page
A Village Astronomer: Life and Works of R. G. Chandra
In the present article we provide a brief introduction to the Life and Works
of Indian astronomer R. G. Chandra.Comment: 29 Latex page
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