110 research outputs found

    Rapid thermal processing systems:oerview of capabilities and limitations

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    \u3cp\u3eThis paper reviews the current status, problems and options in RTP system and process design. Some commercial systems will be discussed along with some improvements that can still be made in temperature reproducibility, process control and yield. This includes some recent developments in temperature reproducibility by compensated emissivity control.\u3c/p\u3

    Gordon E. Moore and his legacy:four decades and counting

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    \u3cp\u3eGordon E. Moore was recognized for his significant contributions to continued innovations in silicon microelectronics. The Electrochemical Society (ECS) established Gordon E. Moore Medal for Outstanding Achievement in Solid-State Science and Technology in May 2006 to honor his efforts in the field. The award honored his significant achievements in this field that had considerable impact on ECS, its members, and the work that they performed. The new winner of the medal was announced in an award ceremony at the plenary session of the ECS spring meeting, held in Chicago in May 2007. Gordon E. Moore played a key role in the formulation of the Moore's Law.\u3c/p\u3

    Rapid thermal annealing of amorphous and nanocrystalline soft-magnetic alloys in a static magnetic field

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    \u3cp\u3eIn this paper, we report on rapid thermal annealing (RTA) of two different soft-magnetic materials in a static magnetic field: amorphous Co-Nb-Zr and nanocrystalline Fe-Nb-N. RTA of Co-Nb-Zr films was investigated in an attempt to suppress the crystallization of Co during the induction of the anisotropy, thus extending the process window of this material in video-head manufacturing. Also, RTA of Fe-Nb-N was studied in an effort to promote the nucleation of nanocrystalline Fe grains, while suppressing the grain growth of Ī±-Fe. Using RTA in a magnetic field, Co-Nb-Zr alloys can be heated to temperatures above 525Ā°C, while suppressing the crystallization of hexagonal-close-packed Co. This temperature is considerably higher than that of conventional magnetic annealing in a furnace (400Ā°C), and thus allows us to combine annealing with other high-temperature processes during recording head manufacturing procedures, such as glass bonding in sandwich head manufacturing. Furthermore, RTA allows the formation of nanocrystalline Fe-TM-N alloys with both a high permeability and a low magnetostriction (TM is a transition metal such as Zr, Hf, Nb, or Ta). Using high processing temperatures and short processing times, both the nucleation of bcc Fe and the segregation of NbN from Fe-Nb-N can be promoted, while the undesired grain growth of Fe is reduced, thus lowering the magnetic anisotropy. Moreover, layers produced in this way have increased resistivity to wear (during tape recording) than conventionally annealed layers.\u3c/p\u3

    SIMS analysis of Al\u3csub\u3ex\u3c/sub\u3eGa\u3csub\u3e1ā€“x\u3c/sub\u3eas/gaas layered structures grown by metalā€organic vapour phase Epitaxy

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    \u3cp\u3eFor Al\u3csub\u3ex\u3c/sub\u3eGa\u3csub\u3e1ā€x\u3c/sub\u3eAs/GaAs layered structures, grown by MOVPE, abrupt interfaces in the order of one atomic distance were observed. These structures are well suited to serve as test samples for studying the influence of bombardment conditions on the quality of SIMS depth profiles. The results of such a study are presented and it is shown that depth profiles can be obtained with a depth resolution of about 25 ƅ. It was found that beyond the interface secondary ion signals decrease exponentially; from the variation of the slope of this exponential decay as a function of primary ion energy it can be concluded that depth resolution is determined by a purely collisional mixing process. From this type of data we can derive a minimal layer thickness in Al\u3csub\u3ex\u3c/sub\u3eGa\u3csub\u3e1ā€x\u3c/sub\u3eAs/GaAs quantum well structures for which quantitative SIMS analysis of the Al content is possible.\u3c/p\u3

    A biosensor device and a method of manufacturing the same

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    A biosensor device (100) for detecting biological particles, the biosensor device (100) comprising a substrate (102), a regular pattern of pores (104) formed in the substrate (102), and a plurality of sensor active structures (106) each of which being arranged on a surface of a corresponding one of the pores (104), wherein each of the plurality of sensor active structures (106) is sensitive to specific biological particles and is adapted to modify electromagnetic radiation interaction properties in the event of the presence of the respective biological particles

    A biosensor device and a method of manufacturing the same

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    \u3cp\u3eA biosensor device (100) for detecting biological particles, the biosensor device (100) comprising a substrate (102), a regular pattern of pores (104) formed in the substrate (102), and a plurality of sensor active structures (106) each of which being arranged on a surface of a corresponding one of the pores (104), wherein each of the plurality of sensor active structures (106) is sensitive to specific biological particles and is adapted to modify electromagnetic radiation interaction properties in the event of the presence of the respective biological particles.\u3c/p\u3

    Exchange-biased spin valves combining a high magnetoresistance ratio with soft-magnetic behavior

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    \u3cp\u3eWe report on the preparation of bottom spin valves combining a high giant magnetoresistance effect (above 10%) with a soft-magnetic behavior (coercivities of a few hundreds of A/m). By optimization of film composition and preparation conditions, it is possible to obtain materials having magnetoresistance values around 16%, which display minor loop coercivities of 0.2 kA/m, and sensitivities of 11%/kA/m.\u3c/p\u3

    Method of plating through wafer vias in a wafer for 3d packaging

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    Therefore, a method of plating wafer via holes in a wafer is provided. A substrate (200) having a first and second side and a plurality of wafer via holes (210) is provided. Each via hole comprises a first and second end extending between the first and second side. A first seed layer (220) is deposited on the first side of the 5 wafer (200). A foil (250) is applied on the first seed layer (220) of the wafer closing the first ends of the plurality of wafer via holes (210). The second side of the wafer (200) is electro-chemically plated and the foil (250) is removed

    Method of plating through wafer vias in a wafer for 3d packaging

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    A method of plating via hole in a substrate includes providing a substrate having a first side and a second side and a plurality of through substrate via holes; depositing a first seed layer on the first side of the substrate; applying a foil on the first seed layer of the substrate closing the first ends of the plurality of via holes; electro-chemical plating of the second side of the substrate; and removing the foi
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