35 research outputs found

    A Standard CMOS Humidity Sensor without Post-Processing

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    A 2 μW power dissipation, voltage-output, humidity sensor accurate to 5% relative humidity was developed using the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a Intervia Photodielectric 8023–10 humidity-sensitive layer, and a CMOS capacitance to voltage converter

    Self-Calibrated Humidity Sensor in CMOS without Post-Processing

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    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry

    A tri-axial accelerometer with structure-based voltage operation by using series-connected piezoelectric elements

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    AbstractOutput-voltage operation on a sensor structure is proposed and a tri-axial accelerometer with low cross-axis sensitivities is designed. The output voltage between the electrodes sandwiching piezoelectric thin-films on a deforming structure is proportional to the in-plane stress of the piezoelectric thin-film. If the piezoelectric thin-film is processed to separated elements and the electrodes of the elements are connected in series, the output voltages from the series-connected piezoelectric elements are multiplied or canceled depending on the situations of the internal-stresses (i.e. compressive or tensile) of the elements. Proper design of the electrode connections by taking the deformation shape of structures into consideration can realize expected outputvoltage operations on the device structure. The principle of structure-based output-voltage operation is applied to the design of a tri-axial accelerometer with low cross-axes sensitivities. Finite-element-method (FEM) simulations of the tri-axial accelerometer revealed the cross-axis sensitivity of less than 1.5%

    Flatness Improvement of Double-Sided Magnetic Film for Narrow Gap Electromagnetic Energy Harvester

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    This paper reports the design, modeling and preliminary fabrication result of the flatness improved magnetic film on a silicon structure for narrow-gap electromagnetic (EMG) vibration energy harvester (VEH). The harvester has double-sided corrugated shape silicon vibration mass with 15 µm-thick NdFeB permanent magnet. The narrower air-gap between the magnetic film and a counter coil electrode the higher output power. While the sputtered magnetic film shows good characteristics equivalent to a bulk magnet, it hinders to reduce the air-gap because the silicon structure was curved by its high residual stress. Applying the double-sided magnet to our previous device, the curvature radius of moving mass with 15 µm-thick NdFeB film was improved from 5.3 m to 40.1 m because of the stress compensation. With the narrowed 2 µm air-gap device, the resulting simulated output power is 48 µW that is 190 times as large as previous device

    Tactile Device Based on Piezoelectric MEMS by Using a Polymer/PZT Laminated Structure

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    Influence of Parasitic Capacitance on Output Voltage for Series-Connected Thin-Film Piezoelectric Devices

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    Series-connected thin film piezoelectric elements can generate large output voltages. The output voltage ideally is proportional to the number of connections. However, parasitic capacitances formed by the insulation layers and derived from peripheral circuitry degrade the output voltage. Conventional circuit models are not suitable for predicting the influence of the parasitic capacitance. Therefore we proposed the simplest model of piezoelectric elements to perform simulation program with integrated circuit emphasis (SPICE) circuit simulations). The effects of the parasitic capacitances on the thin-film Pb(Zr, Ti)O3, (PZT) elements connected in series on a SiO2 insulator are demonstrated. The results reveal the negative effect on the output voltage caused by the parasitic capacitances of the insulation layers. The design guidelines for the devices using series-connected piezoelectric elements are explained
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