Memristor logic design using driver circuitry

A new lower-power gate design for memristor-based Boolean operations. Such a design offers a uniform cell that is configurable to perform all Boolean operations, including the XOR operation. For example, a circuit to perform the AND operation utilizes a first memristor and a second memristor connected in series. The circuit further includes a switch, where a node of the second memristor is connected to the switch. Furthermore, the circuit includes a third memristor connected to the switch in series, where the switch and the third memristor are connected in parallel to the first and second memristors. Additionally, the first voltage source is connected to the first memristor via a first resistor. In addition, a second voltage source is connected in series to the switch and the third memristor. In such a design, the delay is reduced to a single step and the area is reduced to at most 3 memristors.Board of Regents, University of Texas Syste

Memristor-based arithmetic units

The modern computer architecture community is continually pushing the limits of performance, speed, and efficiency. Recently, the ability to satisfy this endeavor with popular CMOS technology has proved difficult, and in many settings, impossible. The community has begun to explore alternatives to standard practices, researching new components such as nanoscale structures. Additional research has applied these new components and their characteristics to rethink the architecture of the latest technology, moving away from the Von Neumann architecture. A leading technology in this effort is the memristor. Memristors are a new class of circuit elements that have the ability to change their resistance value while retaining knowledge of their current and past resistances. Their small form factor, high density, and fast switching times have sparked research in their applications in modern memory hierarchies. However, their utility in arithmetic has been minimally explored. This dissertation describes the prior work in the exploration of memristor technology, fabrication, modeling, and application, followed by the completed research performed in the design and implementation of arithmetic units using memristors. Implementations of popular adders, multipliers, and dividers in the context of memristors are designed using four approaches: IMPLY, hybrid-CMOS, threshold gates, and MAD gates. Each of these approaches has different tradeoffs and benefits for memristor-based design. Although the first three approaches have been defined in prior work, MAD gates are a novel application for memristors proposed that offer lower power, area, and delay as compared to prior approaches. This work explores these benefits for arithmetic unit design. The details of each designs, simulation results, and analyses in terms of complexity and delay and power are presented. For arithmetic units which have been designed or presented in prior work, this research improves upon the design in each metric. Many of the designs are transformed and pipelined to leverage memristor characteristics and the various approaches rather than traditional CMOS and this is discussed in detail. Overall, the proposed designs offer significant improvements to traditional CMOS designs, motivating the effort to continue exploring memristors and their application to modern computer architecture design.Electrical and Computer Engineerin

Memristor-based adders using memristors-as-drivers (MAD) gates

Memristor-based adders using memristors-as-drivers (MAD) gates. As a result of employing MAD gates in memristor-based adders, such as ripple carry adders, carry select adders, conditional sum adders and carry lookahead adders, the number of delay steps may be less than half than the number of delay steps required in traditional CMOS implementations of adders. Furthermore, by using MAD gates, memristor-based adders can be implemented with less complexity (e.g., fewer memristors and drivers). As a result, by the memristor-based adders using MAD gates, the speed and complexity of a wide variety of arithmetic operations is improved.Board of Regents, University of Texas Syste

System design with memristor technologies

System Design with Memristor Technologies explores design solutions for memristors, covering research and development trends in memristor technology, fabrication, modelling, and applications, and the design and implementation of arithmetic units using memristors

The Influence of Post-SLS-Build Annealing on Nylon 11 Material Properties

Functional energy storage and return prosthetic and orthotic devices have been manufactured out of Nylon 11 using selective laser sintering due to its high ductility and energy return properties. However, there is concern that material voids caused by incomplete sintering may compromise material properties and lead to premature fracture. Post-build annealing has the potential to eliminate voids caused by incomplete sintering and increase part ductility and strength. The purpose of this study was to post-build anneal Nylon 11 tensile specimens at 1) slightly below their melting temperature, 2) their recrystallization temperature, and 3) their glass transition temperature for two different time durations (12 and 24 hours) to assess the effectiveness of annealing in improving ductility and strength. Specimens annealed at their glass transition temperature had significantly greater percent elongations and lower Young’s moduli than specimens annealed close to their melting or recrystallization temperatures. At each temperature, specimens annealed for shorter durations demonstrated a greater increase in percent elongations and a greater decrease in Young’s moduli. Annealing at the glass transition temperature for 12 hours resulted in the highest percent elongation, although it was not significantly different from the control (unannealed) specimens. However, at these annealing conditions Young’s modulus significantly decreased from the control specimens. Across all annealing conditions, Young’s modulus and percent elongation were found to be negatively correlated. Future work should focus on annealing specimens for additional combinations of temperature and duration to further improve ductility while minimizing the negative effects on part strength.Mechanical Engineerin