A 1 mG lateral CMOS-MEMS accelerometer

This paper reports a lateral CMOS-MEMS accelerometer with a measured noise floor of 1 mG/√(Hz) and a dynamic range larger than 13 G. The accelerometer is fully compatible with conventional CMOS processes enabling the integration of most of the conditioning circuits. It is fabricated in a three metal layer 0.5 μm CMOS process followed by a two-step dry etch release. An improved curl matching technique is utilized to solve the out-of-plane curl problem. A new differential amplifier is used for the capacitive sensing interface. The CMOS micromachining process used in this project is described. The design of accelerometer, system schematic applying force-balance feedback and experimental test results are presente

What if Wireless Routers were Social? Analyzing Wireless Mesh Networks from a Social Networks Perspective

<p>Wireless mesh networks consist of radio nodes organized in a mesh topology for serving wireless mesh clients to communicate with one another or to connect to the Internet. Nodes in a mesh network can communicate with each other either directly or through one or more intermediate nodes, similar to social networks. WMNs share many common properties with social networks. We first identify the differences and similarities between social networks and WMNs, and then use metrics that are typically used for social network analysis to assess real WMNs. Analyzing real WMN data collected from the University of California at Santa Barbara MeshNet and Massachusetts Institue of Technology Roofnet testbeds reveals that using SNA metrics are helpful in designing WMNs with better performance. We demonstrate the validity of our conclusions and this new approach by focusing on two sample applications: network reliability assessment and channel access scheduling.</p

Laminated High-Aspect-Ratio Microstructures in a Conventional CMOS Process

Electrostatically actuated microstructures with high-aspect-ratio laminated-beam suspensions have been fabricated using conventional CMOS processing followed by a sequence of maskless dry-etching steps. Laminated structures are etched out of the CMOS silicon oxide, silicon nitride, and aluminum layers. The key to the process is use of the CMOS metallization as an etch-resistant mask to define the microstructures. A minimum beam width and gap of 1.2 μm and maximum beam thickness of 4.8 μm are fabricated in a 0.8 μm 3-metal CMOS process available through MOSIS. Structural features will scale in size as the CMOS technology improves. An effective Young's modulus of 63 GPa is extracted from resonant frequency measurements. Cantilevered structures slightly curl up with a radius of curvature of about 4.2 mm. Multi-conductor electrostatic micromechanisms, such as self-actuating springs and nested comb-drive lateral resonators, are successfully produced. Self-actuating springs are self-aligned multi-conductor electrostatic microactuators that are insensitive to curl. The resonance amplitude is 1 μm for an 107 μm-wide×109 μm-long spring with an applied 11 V ac signal. Finite-element simulation using the extracted value for Young's modulus predicts the resonant frequency of the springs to within 6% of the measured value