FPGA-based operational concept and payload data processing for the Flying Laptop satellite

Flying Laptop is the first small satellite developed by the Institute of Space Systems at the Universität Stuttgart. It is a test bed for an on-board computer with a reconfigurable, redundant and self-controlling high computational ability based on the field pro- grammable gate arrays (FPGAs). This Technical Note presents the operational concept and the on-board payload data processing of the satellite. The designed operational concept of Flying Laptop enables the achievement of mission goals such as technical demonstration, scientific Earth observation, and the payload data processing methods. All these capabilities expand its scientific usage and enable new possibilities for real-time applications. Its hierarchical architecture of the operational modes of subsys- tems and modules are developed in a state-machine diagram and tested by means of MathWorks Simulink-/Stateflow Toolbox. Furthermore, the concept of the on-board payload data processing and its implementation and possible applications are described

In-orbit Demonstration of Reaction Control System for Orbital Altitude Change of Micro-Satellite ALE-2

This research presents the results of an in-orbit test of the orbital altitude control for a micro-satellite equipped with the first space-demonstrated high-density small cold gas jet thruster. In the field of micro-satellites, the application of thrusters to practical missions has not yet progressed due to their high cost, mechanical and electrical incompatibility with the satellite bus system, and increased operational risks. By contrast, the demand for orbit control functions has been increasing in recent years with the expansion of micro-satellite applications. The76kg satellite ALE-2 , which was jointly developed by Tohoku University and ALE Co., Ltd., has the world\u27s first challenging mission to artificially generate shooting stars by ejecting small substances (meteor source) from the ejection device fixed on the satellite body. To avoid collision of the ejected meteor source with other flying objects, the mission must be performed in a sun-synchronous orbit at an altitude of less than 400 km, which is lower than that of the International Space Station. However, it is required to maintain the mission orbit autonomously because the orbit decay is large due to the effect of atmospheric drag. In addition, to release the meteor source at an arbitrary orbital position, it is essential to manipulate the ground track by raising and lowering the orbital altitude. Therefore, ALE-2 needs to control the orbit altitude actively and with arbitrary amount of change. In this study, the reaction control system (RCS), which satisfies the orbit change capability, mission requirements, and compatibility with the satellite bus system, is installed on ALE-2 to perform space demonstrations of orbit control and to evaluate the operational performance of the thruster. ALE-2 will be the first to be equipped with a cold gas jet thruster developed by Patched conics, LLC. It is estimated that the thruster is capable of changing altitude more than 1 km by continuous drive for one orbital period. Using this RCS, the following three criteria were set as the evaluation criteria: (Minimum) the orbit altitude can be actively changed by the thruster, (Full) the orbit altitude can be controlled by an arbitrary amount of operation and can be increased more than 1 km per orbit, and (Extra) the mission orbit can be transferred according to the meteor source release plan. ALE-2 was launched on December 6, 2019, and the in-orbit test of the RCS started four months later. Although the RCS was not able to achieve its initial orbit change capability due to an anomaly in the power supply system, various kinds of tests were conducted under conditions that allowed continuous thruster operation. It was confirmed that the orbit altitude was increased by 0.4 km per orbit. In addition, the fault detection, isolation and recovery (FDIR)function was effectively performed against any kinds of anomalies of RCS during in-orbit operation. Therefore, a sustained orbital altitude of 400 km was expected to be achievable using the onboard RCS

Statistical Analysis of Lessons Learned from University Satellite Projects in Japan

University Space Engineering Consortium (UNISEC) is a non-profitable organization established in 2003 with the purpose of supporting the “ realization of practical space engineering activities, ” and providing support to universities and research institutions in Japan. UNISEC has accumulated practical experiences and achievements from more than 80 micro- and nano-satellite projects of the corporate partners, which also includes the two world-first-CubeSats launched in 2003. Following the recent drastic increase of academic and commercial space development and utilization activities all over the world, UNISEC has recently conducted a survey on the lessons learned of safety and mission assurance of these satellites partly as a contract from JAXA, to distill the best practices to ensure the mission success of the satellites. The survey contains replies from more than 15 faculty members and researchers of 10 universities or institutions or colleges with information about 36 satellite projects, 208 individual success and failure cases. In this research, we analyzed questionnaires of lessons learned from each satellite project statistically by sampling specific terms and counting frequency. The questionnaire contains technical topics and project management topics (including human factors, team/organization factors, schedule factors) for the analysis of individual subjects of success or failure. The examples are categorized into the following: Accomplishments or failures of the mission on orbit, Demonstrations or troubles on the bus functions, and Supplemental products (design/test process, educational effects)

Development of an Operating Strategy for On-Demand Earth Observation Missions of the Diwata-2 Microsatellite

Diwata-2 is the Philippines’ 2nd microsatellite developed by Tohoku University, Hokkaido University, University of the Philippines, and the Philippine Department of Science and Technology. Its primary purpose is gathering remote sensing data through imaging areas of interest for the Philippines. This paper presents the study of Diwata-2’s initial Earth observation pointing performance, investigation of its Attitude Determination and Control System, the tuning of its Star Tracker sensor parameters, the in-flight target pointing calibration, and the sequential scheduling of its components forming an operation strategy for an effective on-demand earth observation mission. This operation strategy has managed to improve the satellite’s pointing performance from the initial 2.88°±2.06° RMS pointing error to having an accuracy of 0.204°±0.12° RMS for its High Precision Telescope payload. This strategy has been implemented to the university-built microsatellite for over 400 successful Earth observation missions and has covered about 82.8% of the Philippine’s land area with its Spaceborne Multispectral Imager payload

Bmi1 regulates memory CD4 T cell survival via repression of the Noxa gene

The maintenance of memory T cells is central to the establishment of immunological memory, although molecular details of the process are poorly understood. In the absence of the polycomb group (PcG) gene Bmi1, the number of memory CD4+ T helper (Th)1/Th2 cells was reduced significantly. Enhanced cell death of Bmi1−/− memory Th2 cells was observed both in vivo and in vitro. Among various proapoptotic genes that are regulated by Bmi1, the expression of proapoptotic BH3-only protein Noxa was increased in Bmi1−/− effector Th1/Th2 cells. The generation of memory Th2 cells was restored by the deletion of Noxa, but not by Ink4a and Arf. Direct binding of Bmi1 to the Noxa gene locus was accompanied by histone H3-K27 methylation. The recruitment of other PcG gene products and Dnmt1 to the Noxa gene was highly dependent on the expression of Bmi1. In addition, Bmi1 was required for DNA CpG methylation of the Noxa gene. Moreover, memory Th2-dependent airway inflammation was attenuated substantially in the absence of Bmi1. Thus, Bmi1 controls memory CD4+ Th1/Th2 cell survival and function through the direct repression of the Noxa gene

FPGA-basierte rekonfigurierbare Bordrechnersysteme für Raumfahrtanwendungen

The purpose of the thesis is to conceptualize an application method of ground-based reconfigurable FPGA (Field Programmable Gate Array) technologies for space systems and to apply the method to the on-board computer of the small satellite Flying Laptop for the on-orbit demonstration. The Flying Laptop satellite is the first small satellite within the Stuttgart small satellite program'' in which several small satellites are developed by the Institute of Space Systems at the Universität Stuttgart. The main mission of the Flying Laptop is to demonstrate the space use of reconfigurable FPGAs for the reconfigurable computing'' on an central on-board computer aboard a spacecraft. Due to their radiation vulnerabilities reconfigurable FPGAs have not yet been employed in practical space applications with high reliability requirements. The Flying Laptop project aims to achieve the world's first orbit demonstration of a purely FPGA-based central on-board computer. Within this research firstly, application methods of reconfigurable FPGAs for space systems were investigated, which are not limited to small satellites but for general space systems. The investigation is based on thorough experimental data survey and analysis of radiation effects on existing FPGA devices. Main radiation effects of single event effects and total ionizing dose effects were extensively investigated. Based on the data obtained, a combinational use of SRAM-FPGAs (multi-chip redundant) and Flash-FPGAs (voting element) for mitigating radiation effects was conceptualized. A mathematical system reliability analysis of repairable multi-redundant systems has been. The analysis illustrates that a multi-redundant system based on SRAM-FPGAs together with a Flash-FPGA based voter provides a sufficiently high reliability for Low Earth Orbit (LEO) missions against radiation effects. After the conceptualization of application methods of reconfigurable FPGAs for the space environment, it is applied to the on-board computer of the small satellite Flying Laptop. Flying Laptop is a cubic, 3-axis stabilized satellite with the edge lengths of about 600mm x 700mm x 800mm and a mass of about 120kg, which shall be launched into sun-synchronous LEO in an altitude of around 600km. A system architecture with four SRAM-FPGA based central processing nodes and one Flash-FPGA based voter was applied for the on-board computer of the Flying Laptop. This on-board computer is the central computing system aboard the satellite and shall be capable of controlling all satellite peripheral electronics. First of all, the system design of the whole satellite has been conducted within the scope of the thesis in order to allow the design of the on-board computer. Based on the established system requirements, the on-board computer of the Flying Laptop was designed and the breadboard model and partly the engineering model of its components are developed. The hardware logic (control algorithm) which shall be implemented into FPGAs can be designed by means of hardware description languages. However, it is no longer software engineering but hardware engineering for generating real hardware logics inside FPGAs which are executed in parallel in real-time. The satellite main functions are designed, developed, and implemented in FPGAs by means of the hardware description languages Handel-C and VHDL. The thesis provides development methods of the control algorithms. In addition to this, a control algorithm development facility has been established for the further design activities. Finally, the developed control algorithms are verified in a simulation and verification environment in order to prove the validities of the above described developments. First of all, an FPGA hardware-in-the-loop real-time simulation environment has been established based on the Model-based Development and Verification Environment (MDVE). MDVE was established at the Institute of Space Systems supported by EADS Astrium. The communication interface between the MDVE and FPGAs are developed, including the required hardware components and the serialization algorithms of communication lines inside an FPGA. Using this simulation and verification environment, extensive simulations have been conducted and the design of the on-board computer, as well as the system design of the whole satellite are validated. At the end, an extended investigation has been conducted on formal verification methods of the hardware-logic in order to provide the way of strict design verifications. This thesis establishes the basis of principle application methods of reconfigurable FPGA technologies for reconfigurable computing'' on space systems which provides innovative solutions for high computational demands of future space applications.Das Ziel dieser Dissertation ist der Entwurf eines Verfahrens zum Einsatz von herkömmlichen FPGA (Field Programmable Gate Array) Technologien für die Raumfahrt und die Demonstration dieses Verfahrens als Bordrechner des Kleinsatelliten Flying Laptop. Der Flying Laptop ist der erste von mehreren Kleinsatelliten, der im Rahmen des Stuttgarter Kleinsatellitenprogrammes,'' am Institut für Raumfahrtsysteme der Universität Stuttgart entwickelt wird. Der Haupteinsatz des Flying Laptop ist die Demonstration von rekonfigurierbaren FPGAs im Weltraum zum Reconfigurable Computing'' auf einem zentralen Bordrechner eines Raumfahrzeugs. Dies wurde wegen der Strahlungsanfälligkeit dieser Bauteile bisher nicht in Raumfahrtsystemen mit hoher Zuverlässigkeitsanforderung verwendet. Der Flying Laptop wird als weltweit erstes Raumfahrzeug einen reinen FPGA-basierten Bordrechner verwenden. Im Rahmen dieser Arbeit wurden zuerst die Anwendungsverfahren der rekonfigurierbaren FPGAs für Raumfahrtsysteme erforscht, die nicht nur für Kleinsatelliten, sondern auch für allgemeine Raumfahrtsysteme gelten. Die Forschung basiert auf einer vollständigen Recherche über experimentelle Daten und Analysen der Strahlungsanfälligkeit vorhandener FPGA-Bauteile. Die Hauptauswirkungen von Single Event Effects'' und Total Ionizing Dose'' wurden ausführlich untersucht. Ausgehend von den erhaltenen Daten wurde ein kombinierter Einsatz der SRAM-FPGAs (multi-chip redundant) und Flash-FPGAs (voting elemente) entworfen, um die Strahlungsanfälligkeit zu reduzieren. Eine mathematische Systemzuverlässigkeitsanalyse der wiederherstellbaren Multi-Redundantsystemen wurde durchgeführt. Diese Analysen stellen dar, dass ein Multi-Redundantsystem mit SRAM-FPGAs zusammen mit einem Flash-FPGA basierten Voter trotz Strahlungsanfälligkeit in einer niedrigen Erdumlaufbahn eine hinreichende Zuverlässigkeit gewährleistet. Dieses Implementierungsverfahren der rekonfigurierbaren FPGAs für die Weltraumumgebung wurde nach dem Entwurf für den Bordrechner des Kleinsatelliten Flying Laptop angewendet. Der Flying Laptop ist ein würfelförmiger dreiachsenstabilisierter Satellit mit den Kantenlängen von etwa 600mm x 700mm x 800mm und einer Masse von etwa 120kg, der in einer sonnensynchronen niedrigen Erdumlaufbahn mit einer Höhe von etwa 600km eingesetzt werden soll. Eine Systemarchitektur mit vier SRAM-FPGA basierten Central Processing Nodes'' und einem Flash-FPGA basierten Voter wurde für den Bordrechner des Flying Laptop festgelegt. Dieser Bordrechner ist das zentrale Rechensystem auf dem Satelliten, das alle Satellitenkomponenten steuern soll. Als Erstes wurde im Rahmen der Dissertation das Systemdesign des ganzen Satellitensystems durchgeführt, um das Design des Bordrechners zu ermöglichen. Basierend auf den festgestellten Systemanforderungen wurde der Bordrechner des Flying Laptop ausgelegt. Außerdem wurden ein Breadboard-Modell des Bordrechners und teilweise die Engineering-Modelle seiner Komponenten entwickelt. Die Hardwarelogik (Steuerungsalgorithmen), die in den FPGAs implementiert werden sollen, können mit Hardwarebeschreibungssprachen entwickelt werden. Es handelt sich hierbei also nicht mehr um Softwareentwicklung, sondern um Hardwareentwicklung. Dabei wird die echte Hardwarelogik in den FPGAs produziert, die parallel in Echtzeit abgearbeitet wird. Die Hauptfunktionen des Satelliten wurden mit den Hardwarebeschreibungssprachen Handel-C und VHDL ausgelegt, entwickelt, und in die FPGAs implementiert. Die Dissertation stellt die Entwicklungsstrategie für die Steuerungsalgorithmen bereit. Zusätzlich wurde die Infrastruktur für weitere Designaktivitäten aufgebaut. Schließlich wurden die Steuerungsalgorithmen in einer Simulations- und Verifikationsumgebung geprüft. Dafür wurde zunächst eine Hardware-in-the-Loop''-Simulationsumgebung aufgebaut, die auf einer Modell-basierten Entwicklungs- und Verifikationsumgebung (Model-based Development and Verifikation Environment (MDVE)) basiert. Die MDVE wurde mit Unterstützung von EADS Astrium am Institut für Raumfahrtsysteme zur Verfügung gestellt. Die Kommunikationsschnittstelle zwischen MDVE und FPGAs wurde entwickelt, einschließlich der benötigten Hardwarekomponenten und des Algorithmus, welcher die Kommunikationskanäle innerhalb einem FPGA in serielle Reihenfolge bringt. Mittels dieser Simulations- und Verifikationsumgebung wurden ausführliche Simulationen durchgeführt. Daraus resultierend wurde die Gültigkeit des Bordrechnerdesigns sowie das Systemdesigns für den gesamten Satelliten validiert. Schlussendlich wurde eine erweiterte Untersuchung über formale Verifikationsverfahren der Steuerungsalgorithmen durchgeführt, um eine strikte Designverifikation zu ermöglichen. Diese Dissertation legt die Basis für ein Anwendungsverfahren von rekonfigurierbaren FPGA-Technologien auf Raumfahrzeugen. Dieses Verfahren stellt eine innovative Lösung für erhöhte Rechenanforderungen von zukünftigen Raumfahrtanwendungen dar