Security layers and related services within the Horizon Europe NEUROPULS project

In the contemporary security landscape, the incorporation of photonics has emerged as a transformative force, unlocking a spectrum of possibilities to enhance the resilience and effectiveness of security primitives. This integration represents more than a mere technological augmentation; it signifies a paradigm shift towards innovative approaches capable of delivering security primitives with key properties for low-power systems. This not only augments the robustness of security frameworks, but also paves the way for novel strategies that adapt to the evolving challenges of the digital age. This paper discusses the security layers and related services that will be developed, modeled, and evaluated within the Horizon Europe NEUROPULS project. These layers will exploit novel implementations for security primitives based on physical unclonable functions (PUFs) using integrated photonics technology. Their objective is to provide a series of services to support the secure operation of a neuromorphic photonic accelerator for edge computing applications.Comment: 6 pages, 4 figure

On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF

International audiencePhysical Unclonable Functions (PUFs) allow generating an intrinsic signature in electronic device thanks to process variability. One of the most researched solutions for PUF implementation is the Ring Oscillator PUF (RO-PUF). This solution is based on the comparison of the frequency of 2 identically designed ROs in an IC. Ideally these 2 ROs would have the same frequency, however this in not the case in reality due to fabrication-induced process variability. By measuring and comparing their actual frequency, a 1-bit PUF response is generated. The RO-PUF has been demonstrated to satisfy the principal randomness requirements (uniformity and uniqueness) but it suffers from problems such as bitaliasing and unrepeatability (i.e. low reliability). In this paper we perform a thorough analysis of RO-PUF bitaliasing and reliability and propose a methodology for its analytical estimation based on the variability profile of the underling technology.</p

PFS - Memristor-based security primitives

With the rapid growth of IoT and embedded devices, the development of low power, high density, high performance SoCs has pushed the embedded memories to their limits and opened the field to the development of emerging memory technologies. The Resistive Random Access Memory (ReRAM) has emerged as a promising choice for embedded memories due to its reduced read/write latency and high CMOS integration capability. Intrinsic properties of ReRAMs make them suitable for the implementation of basic security primitives such as Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs). The studies to be carried out during this thesis will allow the creation of robust, low cost and reliable security primitives by exploiting the inner variability of memristive technologies

POS2 - On-Line Reliability Estimation of Ring Oscillator PUF

In this paper we propose an on-line test methodology for RO-PUF reliability which enables high accuracy in the results since it is not based on predictive simplified models of the device variability and noise, but on actual technological electrical models and high versatility since it is not based on measurements extracted from a single technology

On-Line Reliability Estimation of Ring Oscillator PUF

International audienceIn this paper we propose an on-line test methodology for RO-PUF reliability which enables high accuracy in the results since it is not based on predictive simplified models of the device variability and noise, but on actual technological electrical models and high versatility since it is not based on measurements extracted from a single technology.</p

Open Automation Framework for Complex Parametric Electrical Simulations

International audienc

SRAM-PUF: Platform for Acquisition of Sram-Based Pufs from Micro-Controllers

International audienceThis demonstration shows a versatile platform for the acquisition of the content of SRAM memories embedded in microcontrollers at power-up. The platform is able to power-off and -on hundreds of microcontrollers and to retrieve the content of their SRAMs thanks to a scan chain connecting all boards. The data collected is then stored in a database to enable reliability analysis.</p