47 research outputs found
Charge response function and a novel plasmon mode in graphene
Polarizability of non-interacting 2D Dirac electrons has a 1/\sqrt{qv-\omega}
singularity at the boundary of electron-hole excitations. The screening of this
singularity by long-range electron-electron interactions is usually treated
within the random phase approximation. The latter is exact only in the limit of
N -> infinity, where N is the ``color'' degeneracy. We find that the
ladder-type vertex corrections become crucial close to the threshold as the
ratio of the n-th order ladder term to the same order RPA contribution is
(\ln|qv-\omega|)^n/N^n$. We perform analytical summation of the infinite series
of ladder diagrams which describe excitonic effect. Beyond the threshold,
qv>\omega, the real part of the polarization operator is found to be positive
leading to the appearance of a strong and narrow plasmon resonance.Comment: 4 pages, 3 figures,typos correcte
Charge response function and a novel plasmon mode in graphene
Journal ArticlePolarizability of noninteracting 2D Dirac electrons has a 1 1 / √qv-ω singularity at the boundary of electron-hole excitations. The screening of this singularity by long-range electron-electron interactions is usually treated within the random phase approximation. The latter is exact only in the limit of N →∞, where N is the ‘‘color'' degeneracy.We find that the ladder-type vertex corrections become crucial close to the threshold as the ratio of the nth order ladder term to the same order random phase approximation contribution is lnn|qv - ω|/Nn. We perform an analytical summation of the infinite series of ladder diagrams which describe the excitonic effect. Beyond the threshold, qv > ω, the real part of the polarization operator is found to be positive leading to the appearance of a strong and narrow plasmon resonance
Challenges in Modelling and Verification of Transmitter Circuits for Advanced Mobile Storage Physical layer
Abstract: Flash memory is a key component of today’s mobile phones providing embedded storage for text and media and removable storage for a variety of purposes e.g. Video. Many standard bodies support mobile storage e.g. sdcard.org, Universal flash storage org. Mobile storage today is evolving continuously with ever increasing bandwidth and capacity demands. IP Blocks and Technologies Groups specializes in providing Host controller and Physical Layer solution for variety of mobile devices including phones, tablets, laptops/ultra-books Current project is focusing on Physical layer design and verification – which consists of Digital Frontend (DFE) including Serial/De-serializer, encoding, decoding schemes, and an analog front-end (AFE) which consists of Transmitter/Receiver Circuits. The Phy also includes PLL, Clock Distribution and Compensation circuits to support DFE and AFE. The focus of the current project is to develop methodology and techniques to validate transmitter circuit for mobile storage comprehensively.
DOI: 10.17762/ijritcc2321-8169.15066
Top-Down Integration Methodology for Clocking Blocks into High Speed Serial IO
High Speed Serial Input-Output (HSIOs) design architecture is widely used for many applications in today’s System-On-Chips (SOCs). SOCs integrate a number of protocols including PCIe, SATA, SD4, USB3, etc. which are based on IO architecture. Typical HSIO integrates Analog blocks such as Receiver (Rx), Transmitter (Tx) and Clocking (PLL, Clock Distribution) functions along with sea of logic gates for PCS (Physical Connectivity Sub layer), logic micro-partitions for Tx/Rx power management, encoding/decoding and Serialization/Deserialization functions. The top level design database is typically RTL leading to a sea of gates when synthesized. The top level design is implemented using standard ASIC design flow including RTL, Simulation, Synthesis, Timing, Place & Route, and Formal Verification etc. However, the partitions for Tx, Rx, PLL and Clocking are Analog/Custom hard-macros. To ensure proper functionality, integrity (for low power, timing, Place and route, Mixed Signal/IP level validation) we need to model hard-macros in a digital friendly manner. For functionality verification purpose, we model the macro behavior in Verilog, timing needs to be abstracted in industry standard liberty file format (lib file), for place and route we abstract the physical information in LEF/FRAM format etc. In HIP, while there are methods to build these individually, streamlined methodology for building these with consistency, quality and flow friendly manner is missing. The focus of this project is to formulate a methodology for hard-macro integration into top level HSIO database, and apply this for Secure Digital card (SD4) IO that is being developed in IP Blocks.
DOI: 10.17762/ijritcc2321-8169.15066
A Comprehensive Survey on Resource Management in Internet of Things, Journal of Telecommunications and Information Technology, 2020, nr 4
Efficient resource management is a challenging task in distributed systems, such as the Internet of Things, fog, edge, and cloud computing. In this work, we present a broad overview of the Internet of Things ecosystem and of the challenges related to managing its resources. We also investigate the need for efficient resource management and the guidelines given/suggested by Standard Development Organizations. Additionally, this paper contains a comprehensive survey of the individual phases of resource management processes, focusing on resource modeling, resource discovery, resource estimation, and resource allocation approaches based on performance parameters or metrics, as well as on architecture types. This paper presents also the architecture of a generic resource management enabler. Furthermore, we present open issues concerning resource management, pointing out the directions of future research related to the Internet of Thing
Visualization of nano-plasmons in graphene
We study localized plasmons at the nanoscale (nano-plasmons) in graphene. The
collective excitations of induced charge density modulations in graphene are
drastically changed in the vicinity of a single impurity compared to graphene's
bulk behavior. The dispersion of nano-plasmons depends on the number of
electrons and the sign, strength and size of the impurity potential. Due to
this rich parameter space the calculated dispersions are intrinsically
multidimensional requiring an advanced visualization tool for their efficient
analysis, which can be achieved with parallel rendering. To overcome the
problem of analyzing thousands of very complex spatial patterns of
nano-plasmonic modes, we take a combined visual and quantitative approach to
investigate the excitations on the two-dimensional graphene lattice. Our visual
and quantitative analysis shows that impurities trigger the formation of
localized plasmonic excitations of various symmetries. We visually identify
dipolar, quadrupolar and radial modes, and quantify the spatial distributions
of induced charges.Comment: 14 pages, 9 figure
Quantum fluctuations and strong mass renormalization in NiCl2-4SC(NH2)2
In a number of quantum paramagnets, magnetic field can induce a quantum phase
transition to an antiferromagnetic state which exists for a range of fields Hc1
< H < Hc2. Generally, these compounds exhibit a significant asymmetry in their
properties at low- and high-field transitions. Here we present detailed
specific heat and thermal conductivity measurements in NiCl2-4SC(NH2)2 together
with analytical and numerical results. We show that the asymmetry is caused by
a strong renormalization of the effective mass of spin excitations due to
quantum fluctuations for H<Hc1 that are absent for H<Hc2.Comment: 4 pages, 3 figures. Acepted for publication in Phy. Rev. Let