Solution processible organic transistors and circuits based on a C-70 methanofullerene

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Introduction to the Special Issue on the 46th European Solid-State Circuits Conference (ESSCIRC)

\u3cp\u3eWelcome to this special issue of the journal covering the 46th European Solid-State Circuits Conference, ESSCIRC 2016. The conference was held in Lausanne, Switzerland, September 13–15, 2016. From the 94 papers presented at the conference, a selection of 21 papers was made for inclusion in this special issue. As Guest Editors, we have used the inputs of the technical program committee and the session chairs, as well as the audience ratings. The selected papers are briefly introduced below.\u3c/p\u3e\u3cp\u3eThe papers in this special section were presented at the 46th European Solid-State Circuits Conference (ESSCIRC) that was held in Lausanne, Switzerland, September 13–15, 2016. \u3c/p\u3

Design of analogue and digital building blocks with printed unipolar organic thin-film transistors

This work presents a number of analogue and digital building blocks, designed with a novel printed unipolar organic technology exploiting gravure. Among digital circuits, the design of e.g. dynamic flip-flops is presented. Reliable memory cells are a key element to create sequential logic, which is widely used in applications such as RFIDs and to address sensor matrixes. In addition, the design of analogue amplifiers is discussed. Topologies achieving high gain and suitable for sensor\u3cbr/\u3einterface applications are presented

Introduction to the Special Issue on the 2009 IEEE International Solid-State Circuits Conference

The papers in this special issue are divided into the following areas: High-Performance Digital; Low-Power Digital; Memory; and Technology Directions. The IEEE International Solid-State Circuits Conference (ISSCC) was held in San Francisco, CA, February 8-12, 2009

A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with data-driven noise reduction

Low-power sensor applications e.g. for environmental monitoring, bio-potential recording, and wireless autonomous sensor networks require highly power-efficient ADCs, typically with resolutions of at least 10b. SAR ADCs are generally beneficial in terms of power efficiency. However, the most power-efficient designs currently lack the required accuracy for these applications [1, 2], as they are limited to 9b ENOB. Other designs that have sufficient accuracy (10b) are limited to power efficiencies above 10fJ/conv-step [3]. The aim of this work is to increase the accuracy of highly efficient SAR ADCs beyond 10b, while further improving the efficiency to 2.2fJ/conv-step. To do so, this work introduces a Data-Driven Noise-Reduction method to efficiently suppress comparator noise, applies a segmented capacitive DAC with 250aF unit elements for better efficiency and accuracy, and implements a self-oscillating comparator to locally generate the internally required oversampled clock

A 93.3% peak-efficiency self-resonant hybrid-switched-capacitor LED driver in 0.18-μm CMOS technology

\u3cp\u3eThis paper presents an integrated light-emitting diode (LED) driver based on a self-resonant hybrid-switched-capacitor converter (H-SCC) operating in the megahertz range. An integrated zero-current detection (ZCD) circuit is designed to enable self-resonant operation and zero-current switching. A self-resonant timer is proposed to set the switching frequency to resonance automatically, accommodating for variations in the LED voltage, output current, inductor value, and/or parasitic components, and improving the converter efficiency at light loads without the need for an accurate clock with variable frequency. A ZCD threshold control is also proposed to enable continuous conduction mode and improve efficiency at large currents. The design of high-speed integrated current sensors to measure the inductor current in the H-SCC is also presented. Capacitors, power switches, ZCD, current monitors, and the control circuitry of the LED driver are integrated on-chip in a low-cost, 5-V, 0.18-μm bulk CMOS technology. The proposed driver was measured using inductor values between 36 and 470 nH. It achieves a peak efficiency of 93.3% and an efficiency of 83.1% at the nominal current. The LED driver is able to control a 700-mA LED down to less than 10% of its nominal current. The effective chip area is 7.5 mm \u3csup\u3e2\u3c/sup\u3e, and the maximum power density is 373 mW/mm \u3csup\u3e2\u3c/sup\u3e. To our knowledge, this LED driver can achieve efficiencies comparable to prior art LED drivers using a 6.6 × smaller inductor. \u3c/p\u3