Point-to-point connectivity between neuromorphic chips using address events

This paper discusses connectivity between neuromorphic chips, which use the timing of fixed-height fixed-width pulses to encode information. Address-events (log2 (N)-bit packets that uniquely identify one of N neurons) are used to transmit these pulses in real time on a random-access time-multiplexed communication channel. Activity is assumed to consist of neuronal ensembles--spikes clustered in space and in time. This paper quantifies tradeoffs faced in allocating bandwidth, granting access, and queuing, as well as throughput requirements, and concludes that an arbitered channel design is the best choice.The arbitered channel is implemented with a formal design methodology for asynchronous digital VLSI CMOS systems, after introducing the reader to this top-down synthesis technique. Following the evolution of three generations of designs, it is shown how the overhead of arbitrating, and encoding and decoding, can be reduced in area (from N to √N) by organizing neurons into rows and columns, and reduced in time (from log2 (N) to 2) by exploiting locality in the arbiter tree and in the row–column architecture, and clustered activity. Throughput is boosted by pipelining and by reading spikes in parallel. Simple techniques that reduce crosstalk in these mixed analog–digital systems are described

A burst-mode word-serial address-event link--II: receiver design

We present a receiver for a scalable multiple-access inter-chip link that communicates binary activity between two-dimensional arrays fabricated in deep submicron CMOS. Recipients are identified by row and column addresses but these addresses are not communicated simultaneously. The row address is followed sequentially by a column address for each active cell in that row; this cuts pad count in half without sacrificing communication capacity. Column addresses are decoded as they are received but cells are not written individually. An entire burst is written to a row in parallel; this increases communication capacity with integration density. Rows are written one by one but bursts are not processed one at a time. The next burst is decoded while the last one is being written; this increases capacity further. We synthesized an asynchronous implementation by performing a series of program decompositions, starting from a high-level description. Links using this design have been implemented successfully in three generations of submicron CMOS technology

Dynamic Computation in a Recurrent Network of Heterogeneous Silicon Neurons

We describe a neuromorphic chip with a two-layer excitatory-inhibitory recurrent network of that exhibits localized clusters of neural activity. Unlike other recurrent networks, the clusters in our network are pinned to certain locations due to transistor mismatch introduced in fabrication. As described in previous work, our pinned clusters respond selectively to oriented stimuli and the neurons\u27 preferred orientations are distributed similar to the visual cortex. Here we show that orientation computation is rapid when activity alternates between layers (staccato-like), dislodging pinned clusters, which promotes fast cluster diffusion

Balancing Guidance Range and Strength Optimizes Self-Organization by Silicon Growth Cones

We characterize the first hardware implementation of a self-organizing map algorithm based on axon migration. A population of silicon growth cones automatically wires a topographic mapping by migrating toward sources of a diffusible guidance signal that is released by postsynaptic activity. We varied the diffusion radius of this signal, trading strength for range. Best performance is achieved by balancing signal strength against signal range

A Silicon Retina that Reproduces Signals in the Optic Nerve

Prosthetic devices may someday be used to treat lesions of the central nervous system. Similar to neural circuits, these prosthetic devices should adapt their properties over time, independent of external control. Here we describe an artificial retina, constructed in silicon using single-transistor synaptic primitives, with two forms of locally controlled adaptation: luminance adaptation and contrast gain control. Both forms of adaptation rely on local modulation of synaptic strength, thus meeting the criteria of internal control. Our device is the first to reproduce the responses of the four major ganglion cell types that drive visual cortex, producing 3600 spiking outputs in total. We demonstrate how the responses of our device’s ganglion cells compare to those measured from the mammalian retina. Replicating the retina’s synaptic organization in our chip made it possible to perform these computations using a hundred times less energy than a microprocessor—and to match the mammalian retina in size and weight. With this level of efficiency and autonomy, it is now possible to develop fully implantable intraocular prostheses

Silicon Neurons that Inhibit to Synchronize

We present a silicon neuron that uses shunting inhibition (conductance-based) with a synaptic rise-time to achieve synchrony. Synaptic rise-time promotes synchrony by delaying the effect of inhibition, providing an opportune period for neurons to spike together. And shunting inhibition, through its voltage dependence, inhibits neurons that are late more strongly (delaying the spike further), thereby pushing them into phase (in the next cycle). We characterize the soma (cell body) and synapse circuits, fabricated in 0.25 µm CMOS. Further, we show that synchronized neurons (population of 256) spike with a period that is proportional to the synaptic rise-time

A linear cochlear model with active bi-directional coupling

We present a linear active cochlear model that includes the outer hair cell (OHC) forces, which are delivered onto upstream and downstream basilar membrane (BM) segments through Deiters\u27 cells (DCs) and their phalangeal processes (PhPs). Due to the longitudinal tilt of the OHC towards the base and the oblique orientation of the PhP towards the apex, each BM segment receives both feed-forward and feed-backward OHC forces. Transverse BM fibers are actively coupled longitudinally through these bi-directional OHC forces, included in a cochlear model for the first time. We present simulation results that demonstrate large amplification and sharp tuning, and we analyze the underlying mechanism

Neuronal Ion-Channel Dynamics in Silicon

We present a simple silicon circuit for modeling voltage-dependent ion channels found within neural cells, capturing both the gating particle\u27s sigmoidal activation (or inactivation) and the bell-shaped time constant. In its simplest form, our ion-channel analog consists of two MOS transistors and a unity-gain inverter. We present equations describing its nonlinear dynamics and measurements from a chip fabricated in a 0.25 /spl µ/m CMOS process. The channel analog\u27s simplicity allows tens of thousands to be built on a single chip, facilitating the implementation of biologically realistic models of neural computation