Novel Floating General Element Simulators Using CBTA

In this study, a novel floating frequency dependent negative resistor (FDNR), floating inductor, floating capacitor and floating resistor simulator circuit employing two CBTAs and three passive components is proposed. The presented circuit can realize floating FDNR, inductor, capacitor or resistor depending on the passive component selection. Since the passive elements are all grounded, this circuit is suitable for fully integrated circuit design. The circuit does not require any component matching conditions, and it has a good sensitivity performance with respect to tracking errors. Moreover, the proposed FDNR, inductance, capacitor and resistor simulator can be tuned electronically by changing the biasing current of the CBTA or can be controlled through the grounded resistor or capacitor. The high-order frequency dependent element simulator circuit is also presented. Depending on the passive component selection, it realizes high-order floating circuit defining as V(s) = snAI(s) or V(s) = s-nBI(s). The proposed floating FDNR simulator circuit and floating high-order frequency dependent element simulator circuit are demonstrated by using PSPICE simulation for 0.25 μm, level 7, TSMC CMOS technology parameters

Real-time frame buffer implementation based on external memory using FPGA

In this paper, design of a real-time video frame buffer with an external memory interface is proposed. In addition, simulation and implementation processes of the design is described. The mentioned system is able to buffer video signals up to 1920×1080 full-HD resolution at 60 Hz frame rate. The memory interface is designed based on an external SDRAM memory and supports burst read/write operations. Input video resolution, video buffer size on memory and burst size of the memory interface are user defined and can be configured.Publisher's Versio

Memristor emulator circuits using single CBTA

Minaei, Shahram (Dogus Author)In this paper, new analog memristor emulator circuits based on current backward transconductance amplifier (CBTA) and passive elements are proposed. They emulate both types of memristor (incremental and decremental) just by interchanging the CBTA output terminals. It uses only one CBTA, two resistors, one capacitor and one multiplier emulating grounded memristor. They consist of less CMOS transistors and have wider output ranges compared to other designed emulator circuits. The CMOS implementation of the CBTA using 0.18 ttm level-7 TSMC CMOS technology parameters is also proposed. It uses 23 CMOS transistors operating with the +/- 0.9 V DC supply voltage. Theoretical derivations and related results are validated using SPICE simulations

Component reduced current-mode full-wave rectifier circuits using single active component

Minaei, Shahram (Dogus Author)This study presents the design of current-mode full-wave rectifier circuits using single active component. The first proposed circuit uses only one operational transconductance amplifier (OTA), two diodes and two resistors. Its current gain can be electronically controlled using the transconductance gain of the OTA. The second proposed circuit uses only one differential voltage current conveyor (DVCC), two diodes and three resistors. Using the complementary metal-oxide semiconductor structure of both OTA and DVCC, the behaviours of the proposed structures have been verified by HSPICE simulations. In addition, both of the proposed circuits are tested practically using commercially available components, such as AD844 and LM13700.Institution of Engineering and Technolog

Ensemble-based surrogate modeling of microwave antennas using XGBoost algorithm

With respect to the ever-increasing performance needs in communication technologies, the need for accurate and computational efficient design optimization methods for high-end microwave designs are also increased. Many studies had been proposed for the last decades for creating numerical modeling methods for having high accurate, stable, and computation efficient solutions suitable to be used in the design optimization process. Ensemble learning is a technique that the models are strategically created and combined to solve a specific computer intelligence challenge and primarily employed to boost the efficiency of a model or to lower the risk of a weak learner collection. Herein, XGBoosting-based ensemble learning had been used for having surrogate models for three different microwave designs. In the first and second study cases, two microwave designs from the literature are taken into consideration for testing the performance of the proposed model with existing methods. Furthermore, a novel antenna design had been studied as a third study case with sparse training samples, to test the performance of the proposed modeling technique. As a result, the proposed method had achieved a remarkable performance for all the mentioned study cases both based on its own performance measures and its comparison with the counterpart algorithms

A voltage-mode PID controller using a single CFOA and only grounded capacitors

Minaei, Shahram (Dogus Author)A new voltage-mode (VM) proportional integral derivative (PID) controller employing only a single active component named Current Feedback Operational Amplifier (CFOA), two resistors and two grounded capacitors is proposed. The proposed PID controller employs a canonical number of only grounded capacitors without requiring any critical passive component matching conditions and cancellation constraints. It has high input and low output impedances; thus, it can be easily cascaded with other VM structures. It can be easily constructed by a single commercially available active element. Frequency-dependent non-ideal gain and parasitic impedance effects on the performance of the proposed PID controller are investigated. The performance of the proposed PID controller circuit is demonstrated by using PSPICE circuit simulation program and an experiment. Also, 0.18 μm CMOS TSMC technology parameters with ±2 V supply voltages are used. Total power dissipation of the proposed PID controller is 1.64 mW

Voltage-mode multiphase sinusoidal oscillators using CBTAs

Minaei, Shahram (Dogus Author) -- Conference full title: 2012 35th International Conference on Telecommunications and Signal Processing, TSP : proceedings : July 3-4, 2012, Prague, Czech Republic.A voltage-mode multiphase sinusoidal oscillator (MSO) structure using current backward transconductance amplifier (CBTA) is presented. The oscillator can generate n voltage signals (n being even or odd) equally spaced in phase. n+1 CBTAs, n grounded capacitor and a grounded resistor are used for nth-state oscillator. The oscillation frequency can be independently controlled through transconductance (g m) of the CBTAs which are adjustable via bias currents. The effects caused by the non-ideality of the CBTA on the oscillation frequency and condition have been analyzed. The performance of the proposed circuit is demonstrated on a third-stage MSO by using PSPICE simulations based on the 0.25 μm TSMC level-7 CMOS technology parameters.ProfiNET Test, s. r. o., NextiraOne Czech s.r.o

Modified Gorski-Popiel technique and synthetic floating transformer circuit using minimum components

Minaei, Shahram (Dogus Author)The aim of this paper is proposing an alternative method to Gorski-Popiel Technique in realization of synthetic transformers. A new synthetic floating transformer (FT) circuit is also given. The proposed synthetic transformer circuit uses two current backward transconductance amplifiers (CBTAs), three resistors, and two grounded capacitors. The primary selfinductance, the secondary self-inductance, and the mutual inductance can be independently controlled and can be tuned electronically by changing the biasing current of the employed CBTAs. It has a good sensitivity performance with respect to tracking errors. A band-pass filter is also realized to test the performance of the proposed synthetic transformer circuit. The validity of the proposed synthetic transformer circuit is demonstrated by PSPICE simulations and experimental results

Real-time video frame differentiator based on DDR3 SDRAM memory interface

In this paper, design of a real-time video frame differentiator based on an external memory interface is proposed. Furthermore, implementation and simulation processes of the design is discussed. The proposed design is capable of differentiating video frames over time, up to full-HD resolution at 60 Hz frame rate. An external SDRAM memory unit is used within the proposed design and drived by a memory interface. In order to improve the flexibility of the architecture, video resolution, video buffer size on memory and burst size of the memory interface are designed to be user defined and configurable.Publisher's Versio

Demo: Real-time video frame differentiator based on external memory interface

Implementation and demonstration processes of a real-time video frame differentiator based on an external memory interface is described in this paper. The video frame differentiation process is successfully implemented on both low cost and high-end FPGA development boards, then demonstrated by using sample videos at 1024x768@60 and 1920x1080@60 resolutions. Input video resolution, video buffer size on memory and burst size of the memory interface can be configured before implementation.Publisher's Versio