23 research outputs found
Work-in-Progress: Triple Event Upset Tolerant Area-Efficient FPGA-Based System for Space Applications and Nuclear Plants
[abstract not available
Fpga-based reliable fault secure design for protection against single and multiple soft errors
© 2020 by the authors. Licensee MDPI, Basel, Switzerland. Field programmable gate arrays (FPGAs) are increasingly used in industry (e.g., biomedical, space, and automotive industries). FPGAs are subjected to single, as well as multiple event upsets (SEUs and MEUs), due to the continuous shrinking of transistor dimensions. These upsets inevitably decrease system lifetime. Fault-tolerant techniques are often used to mitigate these problems. In this research, penta and hexa modular redundancy, as well as dynamic partial reconfiguration (DPR), are used to increase system reliability. We show, depending on the relative rates of the SEUs and MEUs, that penta modular redundancy has a higher reliability than hexa modular redundancy, which is a counter-intuitive result in some cases since increasing redundancy is expected to increase reliability. Focusing on penta modular redundancy, an error detection and recovery mechanism (voter) is designed. This mechanism uses the internal configuration access port (ICAP) and its associated controller, as well as DPR to mitigate SEUs and MEUs. Then, it is implemented on Xilinx Vivado tools targeting the Kintex7 7k410tfbg676 device. Finally, we show how to render this design fault secure in the event that SEUs or MEUs affect the voter itself. This fault secure voter either produces the correct output or gives an indication that the output is incorrect
Using power consumption in the performability of Fault-Tolerant FPGAs
[abstract not available
Mitigating the Effect of Multiple Event Upsets in FPGA-Based Automotive Applications
[abstract not available
FPGA-Based Fault-Tolerant Quadcopter with Fuzzy Obstacle Avoidance
[abstract not available
Highly reliable controller implementation using a network-based fully reconfigurable FPGA for industrial applications
[abstract not available