2 research outputs found
Real-time Implementation of Space Vector Modulation using Arduino as a Low-cost Microcontroller for Three-phase Grid-connected Inverter
This work aims to facilitate the approach of a promising and fascinating technology, which is the photovoltaic (PV) energy, concerning the integration of PV systems to the utility grid from the control/synchronization point of view. Within this context, this paper gives a performance analysis of modeling and driving a two-level three-phase grid-connected PV system, in order to reduce the variations in frequency and phase, as a result, the synchronization between the inverter and the utility grid is accomplished and the correct function of the inverter is performed. MATLAB/Simulink software was utilized to develop the model of the suggested control algorithms. Then, as an interfacing device between the software and the inverter, the Arduino UNO microcontroller is proposed as a low-cost and simplified method to control the three-phase grid-connected inverte
A microsystem design for controlling a DC motor by pulse width modulation using MicroBlaze soft-core
This paper proposes a microsystem based on the field programmable gate arrays (FPGA) electronic board. The preliminary objective is to manipulate a programming language to achieve a control part capable of controlling the speed of electric actuators, such as direct current (DC) motors. The method proposed in this work is to control the speed of the DC motor by a purely embedded architecture within the FPGA in order to reduce the space occupied by the circuit to a minimum and to ensure the reliability of the system. The implementation of this system allows the embedded MicroBlaze processor to be installed side by side with its memory blocks provided by Xilinx very high-speed integrated circuit (VHSIC) hardware description language (VHDL), Embedded C. The control signal of digital pulse-width modulation pulses is generated by an embedded block managed by the same processor. This potential application is demonstrated by experimental simulation on the Vertix5 FPGA chip