Temperature-Independent Current Dispersion in 0.15 μm AlGaN/GaN HEMTs for 5G Applications

Thanks to high-current densities and cutoff frequencies, short-channel length AlGaN/GaN HEMTs are a promising technology solution for implementing RF power amplifiers in 5G front-end modules. These devices, however, might suffer from current collapse due to trapping effects, leading to compressed output power. Here, we investigate the trap dynamic response in 0.15 μm GaN HEMTs by means of pulsed I-V characterization and drain current transients (DCTs). Pulsed I-V curves reveal an almost absent gate-lag but significant current collapse when pulsing both gate and drain voltages. The thermally activated Arrhenius process (with EA ≈ 0.55 eV) observed during DCT measurements after a short trap-filling pulse (i.e., 1 μs) indicates that current collapse is induced by deep trap states associated with iron (Fe) doping present in the buffer. Interestingly, analogous DCT characterization carried out after a long trap-filling pulse (i.e., 100 s) revealed yet another process with time constants of about 1–2 s and which was approximately independent of temperature. We reproduced the experimentally observed results with two-dimensional device simulations by modeling the T-independent process as the charging of the interface between the passivation and the AlGaN barrier following electron injection from the gate

A memory window expression to evaluate the endurance of ferroelectric FETs

The recent discovery of ferroelectricity in HfO2 has revived the interest into non-volatile memories based on ferroelectric transistors (FeFETs). The key advantages of these FeFETs include the low power consumption and the compatibility with the existing CMOS process. On the other hand, issues related mainly to endurance still represent a challenge to the development of the technology. In this Letter, we propose to exploit an analytical expression for the Memory Window (MW) as a simple yet effective characterization tool to evaluate the endurance of FeFETs. The MW is defined as the difference between threshold voltages occurring due to polarization switching. The analytical formulation of the MW allows one to quickly estimate the generated trap concentration as a function of number of writing cycles (or time) without recurring to numerical simulations. With the aid of the analytical model, we find that for typical program/erase pulse amplitudes and duration, endurance has a weak dependence on writing conditions. The characterization technique based on the MW would allow the systematic comparison of the performance and endurance of next-generation FeFETs

Characterization and TCAD Modeling of Mixed-Mode Stress Induced by Impact Ionization in Scaled SiGe HBTs

We investigate the reliability of state-of-the-art SiGe heterojunction bipolar transistors (HBTs) in 55-nm technology under mixed-mode stress. We perform electrical characterization and implement a TCAD model calibrated on the measurement data to describe the increased base current degradation at different collector-base voltages. We introduce a simple and self-consistent simulation methodology that links the observed degradation trend to interface traps generation at the emitter/base spacer oxide ascribed to hot holes generated by impact ionization (II) in the collector/base depletion region. This effectively circumvents the limitations of commercial TCAD tools that do not allow II to be the driving force of the degradation. The approach accounts for self-heating and electric fields distribution allowing to reproduce measurement data including the deviation from the power-law behavior

Insights into the off-state breakdown mechanisms in power GaN HEMTs

We analyze the off-state, three-terminal, lateral breakdown in AlGaN/GaN HEMTs for power switching applications by comparing two-dimensional numerical device simulations with experimental data from device structures with different gate-to-drain spacing and with either undoped or Carbon-doped GaN buffer layer. Our simulations reproduce the different breakdown-voltage dependence on the gate-drain-spacing exhibited by the two types of device and attribute the breakdown to: i) a combination of gate electron injection and source-drain punch-through in the undoped HEMTs; and ii) avalanche generation triggered by gate electron injection in the C-doped HEMTs

Electric Field and Self-Heating Effects on the Emission Time of Iron Traps in GaN HEMTs

In this paper we separately investigate the role of electric field and device self-heating (SHE) in enhancing the charge emission process from Fe-related buffer traps (0.52 eV from Ec) in AlGaN/GaN High Electron Mobility Transistors (HEMTs). The experimental analysis was performed by means of Drain Current Transient (DCT) measurements for either i) different dissipated power (PD,steady) at constant drain-to-source bias (VDS,steady) or ii) constant PD,steady at different VDS,steady. We found that i) an increase in PD,steady yields an acceleration in the thermally activated emission process, consistently with the temperature rise induced by SHE. On the other hand, ii) the field effect turned out to be negligible within the investigated voltage range, indicating the absence of Poole-Frenkel effect (PFE). A qualitative analysis based on the electric field values obtained by numerical simulations is then presented to support the interpretation and conclusions

Gate-Bias Induced RON Instability in p-GaN Power HEMTs

In this letter, we investigate the on-resistance ( RON ) instability in p-GaN power HEMTs induced by a positive or negative gate bias ( VGB ), following the application of a quasi-static initialization voltage ( VGP ) of opposite sign. The transient behavior of this instability was characterized at different temperatures in the 90–135 °C range. By monitoring the resulting drain current transients, the activation energy as well as time constants of the processes are characterized. Not trivially, both RON increase/decrease were found to be thermally activated and with same activation energy. We attribute the thermal activation of both RON increase/decrease to the charging/discharging of hole traps present in the AlGaN barrier in the region below the gate

On the Dynamic RON, Vertical Leakage and Capacitance Behavior in pGaN HEMTs With Heavily Carbon-Doped Buffers

In this letter, we investigate the effect of Carbon (C) doping concentration on dynamic RON, vertical leakage and Capacitance-Voltage (C-V) characteristics of p-GaN gate High Electron Mobility Transistors (HEMTs). Measurements performed on state-of-the-art samples show that further increasing C-doping concentration in the GaN buffer above 1019 cm−3 yields a reduced dynamic-RON degradation, in contrast with the behavior reported in the literature for lower C-doping concentrations. This is confirmed by a complete data set showing a consistent increase in the vertical leakage and in the output capacitance while increasing the C doping, stemming from a less insulating buffer and a reduced 2-DEG depletion, respectively. These observations can be attributed to an increased incorporation of compensating donors leading to a reduction of the net acceptors as the C doping concentration is raised above 1019 cm−3

Mechanisms of Step-Stress Degradation In Carbon-Doped 0.15 μm AlGaN/GaN HEMTs for Power RF Applications

We discuss the degradation mechanisms of C-doped 0.15-μm gate AlGaN/GaN HEMTs tested by drain step-stress experiments. Experimental results show that these devices exhibit cumulative degradation effects during the step stress experiments in terms of either (i) transconductance (gm) decrease without any threshold-voltage (VT) change under OFF-state stress, or (ii) both VT and gm decrease under ON-state stress conditions. To aid the interpretation of the experiments, two-dimensional hydrodynamic device simulations were carried out. Based on obtained results, we attribute the gm decrease accumulating under OFF-state stress to hole emission from CN acceptor traps in the gate-drain access region of the buffer, resulting in an increase in the drain access resistance. On the other hand, under ON-state stress, channel hot electrons are suggested to be injected into the buffer under the gate and in the gate-drain region where they can be captured by CN traps, leading to VT and gm degradation, respectively

Microwave and Millimeter-Wave GaN HEMTs: Impact of Epitaxial Structure on Short-Channel Effects, Electron Trapping, and Reliability

Application of gallium nitride high-electron-mobility transistors (GaN HEMTs) to millimeter-wave power amplifiers requires gate length scaling below 150 nm: in order to control short-channel effects, the gate-to-channel distance must be decreased, and the device epitaxial structure has to be completely redesigned. A high 2-D electron gas (2DEG) carrier density can be preserved even with a very thin top barrier layer by substituting AlGaN with AlN, InAl(Ga)N, or ScAlN. Moreover, to prevent interaction of hot electrons with compensating impurities and defects in the doped GaN buffer, the latter has to be separated from the channel by a back barrier. Other device designs consist in adopting a graded channel (which controls the electric field) or to adopt nitrogen-polar (N-polar) GaN growth (which decreases the distance between gate and channel, thus attenuating short-channel effects). The aim of this article is to review the various options for controlling short-channel effects, improve off-state characteristics, and reduce drain–source leakage current. Advantages and potential drawbacks of each proposed solution are analyzed in terms of current collapse (CC), dispersion effects, and reliability