Characterizing quantum supremacy in near-term devices

© 2018 Macmillan Publishers Limited, part of Springer Nature. All rights reserved. A critical question for quantum computing in the near future is whether quantum devices without error correction can perform a well-defined computational task beyond the capabilities of supercomputers. Such a demonstration of what is referred to as quantum supremacy requires a reliable evaluation of the resources required to solve tasks with classical approaches. Here, we propose the task of sampling from the output distribution of random quantum circuits as a demonstration of quantum supremacy. We extend previous results in computational complexity to argue that this sampling task must take exponential time in a classical computer. We introduce cross-entropy benchmarking to obtain the experimental fidelity of complex multiqubit dynamics. This can be estimated and extrapolated to give a success metric for a quantum supremacy demonstration. We study the computational cost of relevant classical algorithms and conclude that quantum supremacy can be achieved with circuits in a two-dimensional lattice of 7 × 7 qubits and around 40 clock cycles. This requires an error rate of around 0.5% for two-qubit gates (0.05% for one-qubit gates), and it would demonstrate the basic building blocks for a fault-tolerant quantum computer

Demonstration of quantum Zeno effect in a superconducting phase qubit

Quantum Zeno effect is a significant tool in quantum manipulating and computing. We propose its observation in superconducting phase qubit with two experimentally feasible measurement schemes. The conventional measurement method is used to achieve the proposed pulse and continuous readout of the qubit state, which are analyzed by projection assumption and Monte Carlo wave-function simulation, respectively. Our scheme gives a direct implementation of quantum Zeno effect in a superconducting phase qubit.Comment: 5 pages, 4 figure

Escape from a zero current state in a one dimensional array of Josephson junctions

A long one dimensional array of small Josephson junctions exhibits Coulomb blockade of Cooper pair tunneling. This zero current state exists up to a switching voltage, Vsw, where there is a sudden onset of current. In this paper we present histograms showing how Vsw changes with temperature for a long array and calculations of the corresponding escape rates. Our analysis of the problem is based on the existence of a voltage dependent energy barrier and we do not make any assumptions about its shape. The data divides up into two temperature regimes, the higher of which can be explained with Kramers thermal escape model. At low temperatures the escape becomes independent of temperature.Comment: 4 pages 5 figure