22 research outputs found

    Automatic Speech Emotion Recognition Using Machine Learning

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    This chapter presents a comparative study of speech emotion recognition (SER) systems. Theoretical definition, categorization of affective state and the modalities of emotion expression are presented. To achieve this study, an SER system, based on different classifiers and different methods for features extraction, is developed. Mel-frequency cepstrum coefficients (MFCC) and modulation spectral (MS) features are extracted from the speech signals and used to train different classifiers. Feature selection (FS) was applied in order to seek for the most relevant feature subset. Several machine learning paradigms were used for the emotion classification task. A recurrent neural network (RNN) classifier is used first to classify seven emotions. Their performances are compared later to multivariate linear regression (MLR) and support vector machines (SVM) techniques, which are widely used in the field of emotion recognition for spoken audio signals. Berlin and Spanish databases are used as the experimental data set. This study shows that for Berlin database all classifiers achieve an accuracy of 83% when a speaker normalization (SN) and a feature selection are applied to the features. For Spanish database, the best accuracy (94 %) is achieved by RNN classifier without SN and with FS

    Functional Verification of RTL Designs driven by Mutation Testing metrics

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    International audienceThe level of confidence in a VHDL description directly depends on the quality of its verification. This quality can be evaluated by mutation-based test, but the improvement of this quality requires tremendous efforts. In this paper, we propose a new approach that both qualifies and improves the functional verification process. First, we qualify test cases thanks to the mutation testing metrics: faults are injected in the Design Under Verification (DUV) (making DUV's mutants) to check the capacity of test cases to detect theses mutants. Then, a heuristic is used to automatically improve IPs validation data. Experimental results obtained on RTL descriptions from ITC'99 benchmark show how efficient is our approach

    Digital joint phase and sampling instant synchronisation for UMTS standard

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    Publication Date: 3-7 April 2005 On page(s): 1037- 1040 ISBN: 0-7803-9068-7 INSPEC Accession Number: 8670636 Digital Object Identifier: 10.1109/WCACEM.2005.1469760 Posted online: 2005-08-15 08:23:55.International audienceIn asynchronous direct-sequence code division multiple access (DS-CDMA) receivers, one of the major functions is timing and phase synchronisation. Many proposed solutions treat these functions separately. In this paper we present a new joint synchronisation solution for UMTS standard. This solution is based on a digital delay and phase looked loops. In addition this implementation is programmable for the two modes of UMTS (FDD and TDD) with variable over-sampling factor. It has tested in real time on TigerSHARC DSP

    How to Improve a set of design validation data by using mutation-based test

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    International audienceIn current hardware design flow, functional verification is widely acknowledged as the crucial step. This paper presents a new contribution to reduce the cost of this step by automating it. We address here, one of the principal challenges of dynamic verification, by providing a new approach for automatic test generation. This approach combines mutation-based test techniques and genetic algorithms to produce stimuli for design under test. The feasibility of the proposed approach is assessed with a preliminary implementation, and some framework has been tested

    Amélioration des Jeux de Test pour la Validation de Conception

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    Journées Nationales du Réseau Doctoral en MicroélectroniqueDans la méthodologie de conception des circuits intégrés, la vérification fonctionnelle constitue un goulot d'étranglement : elle nécessite des temps de calculs et des investissements importants. Dans ce papier, nous présentons une approche basée sur la simulation qui permet d'améliorer cette vérification fonctionnelle. Cette approche combine les techniques du test par mutation et l'efficacité des algorithmes génétiques pour générer des vecteurs de test

    IP Validation using Genetic Algorithms guided by Mutation Testing

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    International audienceIn this article, we propose a new approach that jointly qualifies and improves Intellectual Properties (IP) validation. This approach uses the Mutation Testing as an evaluation metric (i.e. Mutation Score) and Genetic Algorithm (GA) to improve validation data. Adaptive GA operators (e.g. crossover and genetic mutation) for the generation of test data are presented. Experimental results obtained on ITC'99 benchmark RTL descriptions show the Mutation Score (MS) enhancement achieved and compare this metric to classical metrics

    Impact of Hardware Emulation on the verification quality improvement

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    International audienceSoftware simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is the functional qualification; the second one is the qualification- driven stimuli generation. Currently, the qualification and the generation tasks are iterative processes based on VHDL simulation which is dramatically time consuming. The simulation time increases with the circuits' size and the required level of quality. In our previous works, we have proposed some approaches based on the mutation testing technique to evaluate and to improve functional validation quality. Now, to reduce this simulation time, we propose in this paper a new approach based on FPGA emulation. So, an hardware-software platform called “Meta-Mutant Testbench” is used to emulate mutants. Experimental results for some ITC'99 benchmark circuits show that our mutation emulator is about 20 times faster than classical software simulators; this speedup increases with the circuits' size

    Empirical Mode Decomposition-Based Feature Extraction for Environmental Sound Classification

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    In environment sound classification, log Mel band energies (MBEs) are considered as the most successful and commonly used features for classification. The underlying algorithm, fast Fourier transform (FFT), is valid under certain restrictions. In this study, we address these limitations of Fourier transform and propose a new method to extract log Mel band energies using amplitude modulation and frequency modulation. We present a comparative study between traditionally used log Mel band energy features extracted by Fourier transform and log Mel band energy features extracted by our new approach. This approach is based on extracting log Mel band energies from estimation of instantaneous frequency (IF) and instantaneous amplitude (IA), which are used to construct a spectrogram. The estimation of IA and IF is made by associating empirical mode decomposition (EMD) with the Teager–Kaiser energy operator (TKEO) and the discrete energy separation algorithm. Later, Mel filter bank is applied to the estimated spectrogram to generate EMD-TKEO-based MBEs, or simply, EMD-MBEs. In addition, we employ the EMD method to remove signal trends from the original signal and generate another type of MBE, called S-MBEs, using FFT and a Mel filter bank. Four different datasets were utilised and convolutional neural networks (CNN) were trained using features extracted from Fourier transform-based MBEs (FFT-MBEs), EMD-MBEs, and S-MBEs. In addition, CNNs were trained with an aggregation of all three feature extraction techniques and a combination of FFT-MBEs and EMD-MBEs. Individually, FFT-MBEs achieved higher accuracy compared to EMD-MBEs and S-MBEs. In general, the system trained with the combination of all three features performed slightly better compared to the system trained with the three features separately
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