4 research outputs found

    Evaluation of the oven reflow bonding and flip chip bonder bonding of lead free Sn0.7Cu solder bumped die on low-cost FR-4 substrate for flip-chip applications

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    With the increased awareness of the lead free solder in the electronic packaging industry, the development of the lead free solder on the low-cost FR-4 substrate is a necessary for the flip-chip applications. However, it is found that the high reflow temperature of the lead free solders (normally &gt;250°C) caused substrate burnt related defects in the FR-4 substrates (T<sub>g</sub> &lt;200°C) during bonding process in the traditional reflow oven. In order to solve this problem, bonding was performed on the flip-chip bonder. Using this approach, no substrate burned was observed. Using the flip chip bonder instead of the reflow oven, it is a possible to solve the low T<sub>g</sub> of the FR-4 substrate for the lead free solders flip chip applications. However, the draw back is that solder reflow data provided by solder paste suppliers must be adjusted for the flip chip bonder. In this paper, the main factors (stage temperature, bonding pressure, head temperature, bonding time and moving distance) affecting the bonding process by flip chip bonder in the Sn0.7Cu lead free solder were evaluated. Sn0.7Cu solder is chosen due to its high melting temperature of up to 227°C. If we can demonstrate the solution for this high reflow temperature solder, we can apply the same approach to the others lower melting temperature solders such as SnAgCu, SnAg and SnBi on the FR-4 substrates. The experiments were designed based on the Taguchi method. Die shear test of the bonded samples is selected as the tool to verify the die shear strength of the samples under different experiments. The S/N ratio is used to determine the optimum conditions for the bonding by the flip chip bonder. Based on the analysis of the Variance (ANOVA), the degree of distribution of the five bonding factors to the die shear strength is determined

    Effect of Al pad surface morphology on the flip-chip solder bump reliability

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    The effect of aluminum pad surface morphology on flip-chip solder bump reliability is reported in this paper. The influence of the Al surface morphology to the electroless zinc/nickel/gold UBM surface morphology is presented. The reliability of the solder bump as measured by ball shear force is reported. Al pad samples were produced by two different RF sputtering systems: CVC-601 and Varian-3180. The Al targets used in CVC and Varian system were 99%Al-1%Si and 98.95%Al-1%Si-0.05%Ti respectively. The surfaces of the CVC Al samples were smooth while the Varian Al samples were rough. All the samples undergo electroless zinc/nickel/gold plating. The results suggest that after plating, the smooth Al surface resulted in a fine UBM surface while the rough Al surface gave rise to a coarse UBM surface. Ball shear test was conducted after solder balls were bumped on the UBM. Result shows that the fine UBM surface samples have twice the shear force as compared to the coarse UBM surface samples. The analysis of the results indicate that some ball shear occurred at the UBM and the solder interface for samples with rough UBM surface leading to the lower shear force. In order to obtain a high reliability solder joint, it is essential to maintain a good Al pad surface morphology

    Optimization of stencil printing wafer bumping for fine pitch flip chip applications

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    Stencil printing wafer bumping offers the advantages of low-cost and compatibility with the traditional surface mount assembly equipment. To achieve high quality fine pitch stencil printing wafer bumping, many process parameters need to be optimized. This paper focuses on the optimization of the static and dynamic process parameters for fine pitch flip chip applications. It was found the static parameters have significant effect on the yield of stencil printing process. High printing yield can be achieved by the sound stencil design strategies. The solder paste selection is also critical to the printing quality. Type 6 solder paste produces better printing results. A two level L8 orthogonal array Taguchi experiment was designed and carried out to evaluate the dynamic parameters including squeegee pressure, print speed, separation speed and print gap. Stencil printing quality, solder paste transfer efficiency (TE) and defects rate were measured. The transfer efficiency is defined as the ratio of solder paste volume to the aperture volume. The analysis of variance (ANOVA) based on mean and signal to noise ratio (S/N) were performed using Qualitek-4 software to find out the optimum values of process parameters

    Optimization of electroplating, stencil printing, ball placement solder-bumping flip-chip process technologies

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    Three types of solder bumping processes are studied and optimized including electroplating, stencil printing and solder ball placement. In comparison with the sputtering UBM deposition process, the zincation process in the electroless Ni/Au process is very sensitive for the Al pad preparation process. The properties and effect of electroplated Cu stud and the electroless plated Ni stud are studied. Five kinds of photoresist materials are evaluated for the electroplating bumping process. In the solder bump placement process, the optimum laser power is controlled at the current range of 23 to 26mA with the exposure time of 8 to 10ms. According to the bumping sequences, the effect of every step on the quality and reliability of solder bumps are analyzed to improve the bumping process
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