Triple‐crystal x‐ray diffraction analysis of reactive ion etched gallium arsenide

This is the published version. Copyright 1994 American Institute of PhysicsThe effect of BCl3 reactive ion etching on the structural perfection of GaAs has been studied with diffuse x‐ray scattering measurementsconducted by high‐resolution triple‐crystal x‐ray diffraction. While using a symmetric 004 diffraction geometry revealed no discernible differences between etched and unetched samples, using the more surface‐sensitive and highly asymmetric 113 reflection revealed that the reactive ion etched samples etched displayed less diffusely scattered intensity than unetched samples, indicating a higher level of structural perfection. Increasing the reaction ion etch bias voltage was found to result in decreased diffuse scattering initially, until an apparent threshold voltage was reached, after which no further structural improvement was observed. Furthermore, we have shown that this reduction in process‐induced surfacestructural damage is not due merely to the removal of residual chemical‐mechanical polishing damage

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The final manufacturing process for silicon wafers includes a chemomechanical polishing step. This process gives the silicon wafer its mirror finish, but potentially leaves a thin layer of structurally damaged silicon at the wafer surface. There is at present some concern in the integrated circuit industry that circuit yield and performance in shallow junction, highly integrated MOS IC devices, often with gate oxide thickness in the 100 to 250 Angstrom range, are harmed by such residual damage on incoming wafers. Rather than being completely eliminated by the anneal cycles of the subsequent processing, regions of structural damage on the surface (i. e., polishing damage, scratches, saw marks) have been reported to function as local nucleating sites for stacking faults during oxidation [1]. Similarly, localized surface flaws in the form of minute pits in the silicon surface are found to provide preferential sites for defect generation during dopant diffusion [2]. Also, recent studies by Kugimiya and coworkers have shown that some types of surface defects such as polishing marks, dimples, etc., survive various IC fabrication processes and result in reduced yield [3]