Adhesion lithography for large-area patterning of asymmetric nanogap electrodes

As the resolution of devices in the electronics industry has hit the nanoscale, device fabrication costs have rapidly increased. Whilst commercial technologies such as electron-beam lithography are able to define nanoscale features, they are costly and unsuitable for large area electronics. Research is now focusing on fabrication techniques that can pattern features on the nanoscale on flexible substrates, over large areas without incurring these high costs, such as adhesion lithography (a-Lith). A-Lith is a large-scale fabrication technique for producing planar asymmetric nanogap electrodes [1]. Devices have been created with gap width:length aspect ratios \u3e100000. The technique can be carried out in air and at ambient temperature making it ideal for the field of plastic electronics [2]. The a-Lith technique relies on a self-assembled monolayer (SAM) molecule selectively coating a prepatterned metal (M1) which then changes the adhesion forces. A second metal (M2) is then deposited over the top and can be specifically patterned when peeled using an adhesive due to its reduced adhesion on M1 relative to elsewhere. M2 only remains in the areas where there is no M1 (in the areas where it directly contacts the substrate). Where M2 fractures at the edge of M1, a nanogap (≈10 nm) is formed between the two metals [1]. A-Lith has shown improved device performance across many areas of device electronics as the ability to pattern electrodes side-by-side largely eliminates parasitic capacitances. Such electrodes have been utilized in device applications including high responsivity photodiodes [3], nano organic light emitting diodes [4], memristors [2] and high speed diodes [5]. This fabrication technique was previously only successfully carried out with Al, Au and Ti as M1, and Al and Au as M2, with the Al and Au (with an Al adhesion layer) thermally evaporated. In this work, a-Lith has been successful executed with a variety of materials sputtered including Cu, Ni, Ti, Mo, Cr and Al as M1. M2 is shown to be successful with Al, Ni, Cu and Cr. This has allowed for further devices applications to be explored including devices utilizing 2D materials. References [1] D. J. Beesley et al., “Sub-15-nm patterning of asymmetric metal electrodes and devices by adhesion lithography.” Nat. Commun., vol. 5, (2014), p. 3933. [2] J. Semple et al., “Large-area plastic nanogap electronics enabled by adhesion lithography,” npj Flex. Electron., vol. 18, (2018). [3] G. Wyatt-Moon, et al., “Deep Ultraviolet Copper(I) Thiocyanate (CuSCN) Photodetectors Based on Coplanar Nanogap Electrodes Fabricated via Adhesion Lithography,” ACS Appl. Mater. Interfaces, vol. 9, (2017), p. 41965. [4] G. Wyatt-Moon, et al., “Flexible nanogap polymer light-emitting diodes fabricated via adhesion lithography (a-Lith),” J. Phys. Mater, vol. 1, (2018). [5] J. Semple et al., “Radio Frequency Coplanar ZnO Schottky Nanodiodes Processed from Solution on Plastic Substrates,” Small, vol. 12, (2016), p. 1993

Adhesion Lithography Peel Tool Design

This document describes the adhesion lithography peel tool, designed for the automation of the final step of the adhesion lithography process

Effect of Plasma Treatment on Metal Oxide p–n Thin Film Diodes Fabricated at Room Temperature

Funder: Cambridge Trust; Id: http://dx.doi.org/10.13039/501100003343Abstract: There is a need for a good quality thin film diode using a metal oxide p–n heterojunction as it is an essential component for the realization of flexible large‐area electronics. However, metal oxide‐based diodes normally show poor rectification characteristics whose origin is still poorly understood; this is holding back their use in various applications. A systematic study of the origins of the poor performance is performed based on bias‐stress measurements using a cuprous oxide (Cu2O)/amorphous zinc‐tin oxide (a‐ZTO) heterojunction as an example. This suggests that multiple carrier trapping and thermal release of carriers in defect states stemming from oxygen vacancies at the heterojunction interface is the primary cause of poor rectification. It is demonstrated that a plasma treatment is an effective way to optimize the population of oxygen vacancies at the heterojunction interface based on extensive material analyses, allowing a significant improvement in the diode performance with a much‐enhanced rectification ratio from ≈20 to 10 000, and a consequent facilitation of the next‐generation of ubiquitous electronics

Inkjet printed circuits with two-dimensional semiconductor inks for high-performance electronics

Air-stable semiconducting inks suitable for complementary logic are key to create low-power printed integrated circuits (ICs). High-performance printable electronic inks with two-dimensional materials have the potential to enable the next generation of high performance, low-cost printed digital electronics. Here we demonstrate air-stable, low voltage (< 5 V) operation of inkjet-printed n-type molybdenum disulfide (MoS2) and p-type indacenodithiophene-co-benzothiadiazole (IDT-BT) field-effect transistors (FETs), estimating a switching time of {\tau} ~ 3.3 {\mu}s for the MoS2 FETs. We achieve this by engineering high-quality MoS2 and air-stable IDT-BT inks suitable for inkjet-printing complementary pairs of n-type MoS2 and p-type IDT-BT FETs. We then integrate MoS2 and IDT-BT FETs to realise inkjet-printed complementary logic inverters with a voltage gain |Av| ~ 4 when in resistive load configuration and |Av| ~ 1.36 in complementary configuration. These results represent a key enabling step towards ubiquitous long-term stable, low-cost printed digital ICs

Nanoscale large-area opto/electronics via adhesion lithography

As the feature size of devices in the electronics industry has hit the nanoscale, device fabrication costs have rapidly increased. Whilst commercial technologies such as photolithography are able to produce nanoscale feature size, they are costly and unsuitable for large area printable electronics. To allow for up-scaling of devices considerable research is now focused on new manufacturing processes. Alongside this, new materials such as organics, metal oxides and 2D materials have been developed, allowing for novel device applications to be realised. The ability to deposit these materials at low cost and on large area flexible substrates has been realised with solution processing techniques such as blade coating, inkjet, gravure and screen printing used to deposit materials. To compete with traditional electronics and to allow for commercial applications, however, device performance needs to be improved with reduction in feature size seen as one avenue of interest. This thesis explores and develops the fabrication technique adhesion lithography (a-Lith). This simple process alters the adhesion forces of a metal using the unique properties of self-assembled monolayers (SAMs) to create asymmetric planar electrodes separated by sub 10nm gaps. Using this novel electrode fabrication technique in conjunction with solution processable semiconductors, highly scalable, low-cost, lateral architecture devices can be created. First the optimisation of a-Lith is explored by looking into the influence of metal deposition on the formation of the nanogap by varying the grain size and thickness of the two metal electrodes. Both factors are found to have a large effect on resultant devices with a reduce grain size causing a reduction in device variation and increased metal thickness causing an increase in gap size. The conversion of the process from ridged surfaces to flexible plastic substrates is also investigated with annealing substrates seen to improve the adhesion of the metal thin films and increasing fabrication yield. Solution processed materials were then used to fabricate photodiodes for various applications with copper thiocyanate (CuSCN) used to create deep ultraviolet photodiodes showing high responsivity (719 A/W) and photosensitivity (79). Next zinc oxide (ZnO) was utilised for ultraviolet photodiodes showing a high on/off ratio but slow response times. Finally poly[4,8-bis(5-(2-ethylhexyl)thiophen- 2-yl)benzo[1,2-b:4,5-b0]dit-hiophene-co-3-fluor-othieno[3,4-b]thio-phene-2-carboxylate] (PTB7-Th) in heterojunction structures with 6,6]-Phenyl-C71-butyric acid methyl ester (PC71BM.) and in a Schottky configurations is explored for visible photodiodes showing responsivity of 33 A/W and a detectivity (D) of 6×10^13 Jones, with relatively fast response times (~1 ms). These devices demonstrate the viability of a-Lith for large area fabrication of photodiodes. The a-Lith electrodes were then investigated in light emitting diode (LED) applications. The asymmetric electrodes were used in conjunction with solution processable polymers of varying electroluminescence spectra to create unique nano-polymer LEDs. These devices allow for high current densities to be realised due to reduced Joule heating and showed brightness tunability when device width is varied. The response time of the devices was ~210 µs which enables the devices to be considered for application in the display industry and particularly high-definition optical displays. This work highlights the versatility of the a-Lith technique for LED applications.Open Acces

Radio frequency diodes and circuits fabricated via adhesion lithography

The commercial interest in Radio Frequency Identification (RFID) tags keeps growing, as new application sectors, spanning from healthcare to electronic article surveillance (EAS) and personal identification, are constantly emerging for these types of electronic devices. The increasing demand for the so-called “smart labels” necessitates their high throughput manufacturing, and indeed on thin flexible substrates, that will reduce the cost and render them competitive to the currently widely employed barcodes. Adhesion Lithography (a-Lith) is a novel patterning technique that allows the facile high yield fabrication of co-planar large aspect ratio (&lt;100,000) metal electrodes separated by a sub-20 nm gap on large area substrates of any type. Deposition of high mobility semiconductors from their solution at low, compatible with plastic substrates, temperatures and application of specific processing protocols can dramatically improve the performance of the fabricated Schottky diodes. It will be shown that in this manner both organic and inorganic high speed diodes and rectifiers can be obtained, operating at frequencies much higher than the 13.56 MHz benchmark, currently employed in passive RFID tags and near filed communications (NFC). This showcases the universality of this method towards fabricating high speed p- and n-type diodes, irrespective of the substrate, simply based on the extreme downscaling of key device dimensions obtained in these nanoscale structures. The potential for scaling up this technique at low cost, combined with the significant performance optimisation and improved functionality that can be attained through intelligent material selection, render a-Lith unique within the field of plastic electronics

Promoting Low-Voltage Saturation in High-Performance a-InGaZnO Source-Gated Transistors

As oxide semiconductors increase in popularity with emerging flexible electronics, advances in material performance may lead to parasitic and non-ideal effects becoming more prominent. Specifically, in source-gated transistors, and other contact-controlled devices, the influence of the lateral drain field produced by drain bias leads to an overwhelming increase in charge density at the source edge and obliterates their signature flat saturation at low drain voltages. Here, we present high current density amorphous InGaZnO (a-IGZO) source-gated transistors (SGTs) in a bottom contact architecture using Pt source and drain electrodes. The devices were fabricated by ensuring an oxygen-rich atmosphere to prevent the formation of oxygen vacancies at the Pt/a-IGZO interface. Incorporating a field relief structure within the source contact improves drain current saturation, towards behavior predicted by the saturation coefficient. In the device architecture considered, the screening was less effective for a field plate insulator thickness under 30 nm, possibly due to increased tunnelling. Field plate incorporation is one of the strategies that ensures flat saturation and the suitability of contact-controlled transistors for a multitude of current driving and amplification applications

Effect of Plasma Treatment on Metal Oxide p–n Thin Film Diodes Fabricated at Room Temperature

Funder: Cambridge Trust; Id: http://dx.doi.org/10.13039/501100003343Abstract: There is a need for a good quality thin film diode using a metal oxide p–n heterojunction as it is an essential component for the realization of flexible large‐area electronics. However, metal oxide‐based diodes normally show poor rectification characteristics whose origin is still poorly understood; this is holding back their use in various applications. A systematic study of the origins of the poor performance is performed based on bias‐stress measurements using a cuprous oxide (Cu2O)/amorphous zinc‐tin oxide (a‐ZTO) heterojunction as an example. This suggests that multiple carrier trapping and thermal release of carriers in defect states stemming from oxygen vacancies at the heterojunction interface is the primary cause of poor rectification. It is demonstrated that a plasma treatment is an effective way to optimize the population of oxygen vacancies at the heterojunction interface based on extensive material analyses, allowing a significant improvement in the diode performance with a much‐enhanced rectification ratio from ≈20 to 10 000, and a consequent facilitation of the next‐generation of ubiquitous electronics

Large-area plastic nanogap electronics enabled by adhesion lithography

Large-area manufacturing of flexible nanoscale electronics has long been sought by the printed electronics industry. However, the lack of a robust, reliable, high throughput and low-cost technique that is capable of delivering high-performance functional devices has hitherto hindered commercial exploitation. Herein we report on the extensive range of capabilities presented by adhesion lithography (a-Lith), an innovative patterning technique for the fabrication of coplanar nanogap electrodes with arbitrarily large aspect ratio. We use this technique to fabricate a plethora of nanoscale electronic devices based on symmetric and asymmetric coplanar electrodes separated by a nanogap &lt; 15 nm. We show that functional devices including self-aligned-gate transistors, radio frequency diodes and rectifying circuits, multi-colour organic light-emitting nanodiodes and multilevel non-volatile memory devices, can be fabricated in a facile manner with minimum process complexity on a range of substrates. The compatibility of the formed nanogap electrodes with a wide range of solution processable semiconductors and substrate materials renders a-Lith highly attractive for the manufacturing of large-area nanoscale opto/electronics on arbitrary size and shape substrates