68 research outputs found

    A Novel m6A-Related LncRNA Signature for Predicting Prognosis, Chemotherapy and Immunotherapy Response in Patients with Lung Adenocarcinoma

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    N6-methyladenosine (m6A) and long non-coding RNA (lncRNA) have been associated with cancer prognosis and the effect of immunotherapy. However, the roles of m6A-related lncRNAs in the prognosis and immunotherapy in lung adenocarcinoma (LUAD) patients remain unclear. We evaluated the m6A modification patterns of 695 samples based on m6A regulators, and prognostic m6A-related lncRNAs were identified via a weighted gene co-expression network analysis. Twelve abnormal m6A regulators and nine prognostic lncRNAs were identified. The tumor microenvironment cell-infiltrating characteristics of three m6A-related lncRNA clusters were highly consistent with the three immune phenotypes of tumors, including immune-excluded, immune-inflamed and immune-desert phenotypes. The lncRNA score system was established, and high lncRNA score patients were associated with better overall survival. The lncRNA score was correlated with the expression of the immune checkpoints. Two immunotherapy cohorts supported that the high lncRNA score enhanced the response to anti-PD-1/L1 immunotherapy and was remarkably correlated with the inflamed immune phenotype, showing significant therapeutic advantages and clinical benefits. Furthermore, the patients with high lncRNA scores were more sensitive to erlotinib and axitinib. The lncRNA score was associated with the expression of miRNA and the regulation of post-transcription. We constructed an applied lncRNA score-system to identify eligible LUAD patients for immunotherapy and predict the sensitivity to chemotherapeutic drugs

    Relay-assisted OFDM for NLOS ultraviolet communication

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    Due to copyright restrictions, the access to the full text of this article is only available via subscription.Ultraviolet (UV) communication enables non-line-of-sight (NLOS) outdoor wireless connectivity and is particularly desirable to relax or eliminate pointing and tracking requirements of infrared links. The main two degrading factors in UV links are high path loss and intersymbol interference resulting from the frequency selectivity nature of the channel. In this paper, we propose the powerful combination of relay-assisted (cooperative) transmission and multicarrier architecture based on orthogonal frequency division multiplexing (OFDM) for a superior performance over UV channels. Specifically, we consider a cooperative diversity system with orthogonal cooperation protocol and use DC-biased optical OFDM as the underlying physical layer. We investigate the error rate performance of the proposed relay-assisted OFDM UV system and demonstrate significant performance gains over point-to-point OFDM UV systems

    The Development of the Global Feature eXtractor (gFEX) for ATLAS Level 1 Calorimeter Trigger at the LHC

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    During the ATLAS Phase-I upgrade, the gFEX will be designed to maintain the trigger acceptance against the increasing luminosity for the ATLAS Level-1 calorimeter trigger system. The gFEX is designed to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The prototype v1 and v2 have been designed and fully tested in 2015 and 2016 respectively. With the lessons learned, a pre-production board with three UltraScale+ FPGAs and one ZYNQ UltraScale+, and 35 MiniPODs are implemented in an ATCA module. This board will receive coarse-granularity (0.2x0.2) information from the entire ATLAS calorimeters on up to 300 optical fibers and each FPGA has 24 links to the L1Topo at the speed up to 12.8 Gb/s

    gFEX, the ATLAS Calorimeter Level-1 Real Time Processor

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    The global feature extractor (gFEX) is a component of the Level-1 Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Vertex Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 276 optical fibers with the data transferred at the 40 MHz Large Hadron Collider (LHC) clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor Field-Programmable Gate Array (FPGAs), monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA has been designed for testing and verification. After the elementary technologies have been verified in the pre-prototype, a more advanced prototype with three Vertex Ultra-scale FPGAs is being designed. Although the board is being designed specifically for the ATLAS experiment, it is sufficiently generic that it could be used for fast data processing at other HEP or NP experiments

    The prototype design of gFEX — A component of the L1Calo Trigger for the ATLAS Phase-I upgrade

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    The ATLAS experiment will follow the upgrade steps of the Large Hadron Collider (LHC), which will undergo a series of upgrades to increase the luminosity in the next ten years. During the Phase-I upgrade, a new component will be designed for the ATLAS Level-1 calorimeter trigger system to maintain the trigger acceptance against the increasing luminosity - the global feature extractor (gFEX). The gFEX is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W & Z bosons, top quarks and exotic particles in real time at the LHC crossing rate. A prototype v1 with one System-on-Chip Xilinx ZYNQ FPGA, and one Vertex-7 FPGA for technology validation has been designed and tested in 2015. With the lessons learned from the prototype v1, a prototype v2 with three UltraScale FPGAs and one ZYNQ FPGA is implemented on an ATCA module. This board will receive coarse-granularity information from the entire ATLAS calorimeter on 276 optical fibers at the speed up to 12.8 Gb/s synchronous to the 40 MHz LHC clock. The test results of the prototype v2 show that the main gFEX functionalities are working well. Currently it is being used as the test platform for trigger algorithm development and integration with other detector systems. Based on the prototype v2 design, a prototype v3 design, the final prototype before production, has been started. This features a ZYNQ UltraScale+ FPGA and more fiber optical links to provide compatibility for the High-Luiminosity upgrade of the LHC (HL-LHC)

    The development of Global Feature eXtractor (gFEX) - the ATLAS calorimeter Level 1 trigger for ATLAS at High Luminosity LHC

    No full text
    As part of the ATLAS Phase-I Upgrade, the gFEX is designed to help maintain the ATLAS Level-1 trigger acceptance rate with the increasing LHC luminosity. The gFEX identifies patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the 40MHz LHC bunch crossing rate. The prototype v1 and v2 were designed and fully tested in 2015 and 2016 respectively. A pre-production gFEX board has been manufactured, which is an ATCA module consisting of three UltraScale+ FPGAs and one ZYNQ UltraScale+, and 35 MiniPODs are implemented in an ATCA module. This board receives coarse-granularity (0.2x0.2) information from the entire ATLAS calorimeters on up to 300 optical fibers and 96 links to the L1Topo at the speed up to 12.8 Gb/s

    The development of the Global Feature Extractor for the LHC Run-3 upgrade of the ATLAS L1 Calorimeter trigger system

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    The Global Feature Extractor (gFEX) is one of several modules in LHC Run-3 upgrade of Level 1 Calorimeter (L1Calo) trigger system in the ATLAS experiment. It is a single Advanced Telecommunications Computing Architecture (ATCA) module for large-area jet identification with three Xilinx UltraScale FPGAs for data processing and a system-on-chip (SoC) FPGA for control and monitoring. A pre-prototype board has been designed to verify all functionalities. The performance of this pre-prototype has been tested and evaluated. As a major achievement, the high-speed links in FPGAs are stable at 12.8 Gb/s with Bit Error Ratio (BER) < 10-15 (no error detected). The low-latency parallel GPIO (General Purpose I/O) buses for communication between FPGAs are stable at 960 Mb/s. Besides that, the peripheral components of Soc FPGA have also been verified. After laboratory tests, the link speed test with LAr (Liquid Argon Calorimeter) Digital Processing Blade (LDPB) AMC card has been carried out at CERN for determination of the link-speed to be used for the links between LAr and L1Calo systems. The links from LDPB AMC card to gFEX run properly at both 6.4 Gb/s and 11.2 Gb/s. Test results of pre-prototype board validate the gFEX technologies and architecture. Now the prototype board design with three UltraScale FPGAs is on the way, the status of development will be presented
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