Inductively Coupled Plasma-Induced Etch Damage of GaN p-n Junctions

Plasma-induced etch damage can degrade the electrical and optical performance of III-V nitride electronic and photonic devices. We have investigated the etch-induced damage of an Inductively Coupled Plasma (ICP) etch system on the electrical performance of mesa-isolated GaN pn-junction diodes. GaN p-i-n mesa diodes were formed by Cl{sub 2}/BCl{sub 3}/Ar ICP etching under different plasma conditions. The reverse leakage current in the mesa diodes showed a strong relationship to chamber pressure, ion energy, and plasma flux. Plasma induced damage was minimized at moderate flux conditions ({le} 500 W), pressures {ge}2 mTorr, and at ion energies below approximately -275 V

Microfabrication of membrane-based devices by HARSE and combined HARSE/wet etching

Deep-reactive ion etching (DRIE) of silicon, also known as high-aspect-ratio silicon etching (HARSE), is distinguished by fast etch rates ({approximately}3 {micro}m/min), crystal orientation independence, anisotropy, vertical sidewall profiles and CMOS compatibility. By using through-wafer HARSE and stopping on a dielectric film placed on the opposite side of the wafer, freestanding dielectric membranes were produced. Dielectric membrane-based sensors and actuators fabricated in this way include microhotplates, flow sensors, valves and magnetically-actuated flexural plate wave (FPW) devices. Unfortunately, low-stress silicon nitride, a common membrane material, has an appreciable DRI etch rate. To overcome this problem HARSE can be followed by a brief wet chemical etch. This approach has been demonstrated using KOH or HF/Nitric/Acetic etchants, both of which have significantly smaller etch rates on silicon nitride than does DRIE. Composite membranes consisting of silicon dioxide and silicon nitride layers are also under evaluation due to the higher DRIE selectivity to silicon dioxide

Microfabrication of membrane-based devices by deep-reactive ion etching (DRIE) of silicon

Deep reactive ion etching (DRIE) of silicon was utilized to fabricate dielectric membrane-based devices such as microhotplates, valves and flexural plate wave (FPW) devices. Through-wafer DRIE is characterized by fast etch rates ({approximately} 3 {micro}m/min), crystal orientation independence, vertical sidewall profiles and CMOS compatibility. Low-stress silicon nitride, a popular membrane material, has an appreciable DRIE etch rate. To overcome this limitations DRIE can be accompanied by a brief wet chemical etch. This approach has been demonstrated using KOH or HF/Nitric/Acetic etchants, both of which have significantly lower etch rates on silicon nitride than does DRIE. The DRIE etch properties of composite membranes consisting of silicon dioxide and silicon nitride layers are also under evaluation due to the higher DRIE selectivity to silicon dioxide