A CMOS rail-to-rail linear VI-converter

A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion, while the third changes the bias currents of the first two in response to changes in the input common-mode level. The resulting circuit has a large signal transconductance which is constant to within 3% over the entire common-mode input range. It can operate from a single supply voltage of 2.2 volt

A CMOS rail-to-rail linear VI-converter

A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion, while the third changes the bias currents of the first two in response to changes in the input common-mode level. The resulting circuit has a large signal transconductance which is constant to within 3% over the entire common-mode input range. It can operate from a single supply voltage of 2.2 volt

A low-voltage Op Amp with rail-to-rail constant-gm input stage and a class AB rail-to-rail output stage

In this paper a low-voltage two-stage Op Amp is presented. The Op Amp features rail-to-rail operation and has an @put stage with a constant transconductance (%) over the entire common-mode input range. The input stage consists of an n- and a PMOS differential pair connected in parallel. The constant gm is accomplished by regulating the tail-currents with the aid of an MOS translinear (MTL) circuit. The resulting gn is constant within 5% The common-source output stage employs a feedback circuit which also contains an MTL circuit. This feedback circuit ensures class AB operation and prevents the transistors in the output stage from cutting off. The Op Amp will be realized in a semi custom CMOS process with minimum channel lengths of 1Opm. Simulations show that the minimum supply voltage is less than 2.5 V. A unity gain bandwidth of 550 kHz and a DC voltage gain larger than 80 dB are feasible. The input range exceeds the supply rails, whereas the output range reaches the rails within 130 mV

A low-offset low-voltage CMOS Op Amp with rail-to-rail input and output ranges

A low voltage CMOS op amp is presented. The circuit uses complementary input pairs to achieve a rail-to-rail common mode input voltage range. Special attention has been given to the reduction of the op amp's systematic offset voltage. Gain boost amplifiers are connected in a special way to provide not only an increase of the low-frequency open-loop gain but also a significant reduction of the systematic offset voltag

Current-mode minimax circuit

The minimum-maximum (minimax) circuit selects the minimum and maximum of two input currents. Four transistors in matched pairs are operated in the saturation region. Because the behavior of the circuit is based on matched devices and is independent of the relationship between the drain current and the gate-source voltage, transistor pairs may operate in strong, moderate and weak inversion. Therefore, the circuit can also be implemented in bipolar as well as MOS technology. The circuit has many useful applications in modern signal processin