Parameterized Directed kk-Chinese Postman Problem and kk Arc-Disjoint Cycles Problem on Euler Digraphs

In the Directed $k$-Chinese Postman Problem ($k$-DCPP), we are given a connected weighted digraph $G$ and asked to find $k$ non-empty closed directed walks covering all arcs of $G$ such that the total weight of the walks is minimum. Gutin, Muciaccia and Yeo (Theor. Comput. Sci. 513 (2013) 124--128) asked for the parameterized complexity of $k$-DCPP when $k$ is the parameter. We prove that the $k$-DCPP is fixed-parameter tractable. We also consider a related problem of finding $k$ arc-disjoint directed cycles in an Euler digraph, parameterized by $k$. Slivkins (ESA 2003) showed that this problem is W[1]-hard for general digraphs. Generalizing another result by Slivkins, we prove that the problem is fixed-parameter tractable for Euler digraphs. The corresponding problem on vertex-disjoint cycles in Euler digraphs remains W[1]-hard even for Euler digraphs

A new process capability analysis chart approach on the chip resistor quality management

[[abstract]]Process capability indices have been extensively used to determine whether the quality characteristics of the product meet the preset targets of the customer in manufacturing industries. However, these existing process capability indices cannot categorically determine improvement priorities for substandard quality characteristics. Besides, process capability indices also cannot effectively identify and measure deficiencies in process capability owing to accuracy, precision, or both. In this study, we combine the process capability index Cpm , minimum individual process capability C 0, accuracy A, and precision P to develop a new process capability analysis chart. Managers can apply process capability analysis chart to identify the substandard quality characteristics of the product. Furthermore, if the budget for all substandard quality characteristics improvements is limited, we use the discrimination distance method to measure and determine improvement priorities for substandard quality characteristics. Moreover, we construct an implementation flowchart of the process capability analysis chart to derive the results easily. Finally, an example of a chip resistor is presented to illustrate the applicability of the process capability analysis chart for manufacturing quality management.[[incitationindex]]SCI[[booktype]]紙