20 research outputs found

    Dielectric material options for integrated capacitors

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    Future MIM capacitor generations will require significantly increased specific capacitances by utilization of high-k dielectric materials. In order to achieve high capacitance per chip area, these dielectrics have to be deposited in three-dimensional capacitor structures by ALD or AVD (atomic vapor deposition) process techniques. In this study eight dielectric materials, which can be deposited by these techniques and exhibit the potential to reach k-values of over 50 were identified, prepared and characterized as single films and stacked film systems. To primarily focus on a material comparison, preliminary processes were used for film deposition on planar test devices. Measuring leakage current density versus the dielectric constant k shows that at low voltages (=1 V) dielectrics with k-values up to 100 satisfy the typical leakage current density specification o

    In-situ Raman spectroscopy and laser-induced fluorescence during laser chemical vapor precipitation of silicon nanoparticles

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    Raman scattering in combination with laser-induced fluorescence (LIF) has been used to identify molecules and intermediates during the nucleation and growth of nanosized silicon particles by CO2 laser excitation of silane. Upon switching on the CO2 laser, the silane Raman peak height decreases due to a decrease in species number density and LIF peaks emerge due to presence of SiH2 radicals. The dissociation temperature has been determined inside the reaction zone and a value of 605 K is obtained. The nucleation and growth mechanism starts with the insertion of the SiH2 radicals into the Si-H bond of silane which is demonstrated by the formation of disilane. Amorphous nanosized silicon particles are obtained at reactor pressures of 50 torr and are collected on a cold finger. Keywords : Chemical Vapor Precipitation, CO2 laser excitation, nanosized silicon, Raman spectroscopy, laser-induced fluorescence, SiH2 radical

    Laser CVD of silicon nanoclusters and in-situ process chataracterization

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    Raman scattering in combination with laser-induced fluorescence (LIF) has been used to identify intermediates during the nucleation and growth of nanosized silicon clusters created by CO2 laser excitation of silane. Upon switching on the CO2 laser, the silane Raman peak height decreases due to a decrease in species number density and LIF peaks emerge due to presence of SiH2 radicals. Also a Raman signal of Si2H6 is observed. The dissociation temperature is determined inside the reaction zone with rotational Raman of H2 and equals 605 K which is far below the thermal decomposition temperature of silane. Amorphous silicon nanoclusters are formed and show remarkable optical effects which can be explained with quantum confinement of excitons. The size of these clusters is between 0.8 and 3 n

    Laser-Induced Chemical Vapour Deposition of Silicon Carbonitride

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    Laser-induced Chemical Vapour Deposition of silicon carbonitride coatings and powders has been investigated using hexamethyldisilazane (HMDS) and ammonia as reactants. An industrial CW CO2-laser in parallel configuration has been used to heat up the reactant gases. HMDS dissociates in the laser beam and reactive radicals are formed which increase rapidly in molecular weight by an addition mechanism. Dense polymer-like silicon carbonitride thin films and nanosized powders are formed depending on process conditions. Powder particles are deposited on a substrate by means of a thermal gradient. The primary particle size is about 30 nm. The particles are agglomerated. Depositions are characterized with spectroscopic and chemical analysis and correlated to some important laser process parameters. The powder deposit and the thin film consist of Si-N, Si-C and Si-O bonds according to FTIR-spectroscopy and X-ray Photo-Electron Spectroscopy. A residual amount of hydrogen is present. The material is amorphous (XRD) and has a polymer-like structure. The overall composition varies around Si0.4C0.1N0.3O0.2. The nitrogen content increases significantly by adding ammonia to the reactant gas flow. The high amount of oxygen is caused by hydrolysis and is a result of being exposed to air

    Continuous deep reactive ion etching of tapered via holes for three-dimensional integration

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    A continuous SF6/O2 plasma process at room temperature has been used to etch tapered through-silicon vias using a DRIE-ICP tool. These features (10–100 µm in diameter) are aimed for applications in 3D integration and MEMS packaging. The effects of various process parameters such as O2 flow rate, platen bias, pressure and substrate temperature on the via profile (depth, slope angle and aspect ratio) development are investigated. The etching mechanism was also studied and x-ray photoelectron spectroscopy (XPS) analysis reveals a SiOx passivation layer of the order of ~2 nm on the via sidewall and a substantial temperature dependence. Both tapering and anisotropy of etching depend on this passivation layer formation. Finally, suitable tapered vias with an aspect ratio of ~5 and a slope angle of ~83° are obtained by properly balancing the etching regimes. In this condition, a maximum etch rate of 7 µm min-1 is achieved

    RF characterization and analytical modelling of through silicon vias and coplanar waveguides for 3D integration

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    High-aspect ratio (12.5) through silicon vias (TSV) made in a silicon interposer have been electrically characterized in the direct current (dc) and microwave regimes for 3D interconnect applications. The vias were micro-machined in silicon, insulated, and filled with copper employing a bottom-up copper electroplating technique in a "via-first" approach. DC via resistance measurements show good agreement with the theoretical expected value (~ 16 mO) . Radio-frequency (RF) measurements up to 50 GHz have been performed on coplanar waveguides located on the back-side of the wafers and connected to the front-side with TSVs. The S-parameters indicate clearly the beneficial impact of double sided ground planes of the RF signals. The via resistance extracted from impedance measurements is in good agreement with dc values, while the inductance (53 pH) and capacitance (2.4 pF) of the TSV are much lower than conventional wire bonding, which makes the use of TSV very promising for 3D integration. An advanced analytical model is proposed for the interconnect system with vias and lines and shows very good agreement with the experimental data with a limited number of fitting parameters. This work gives a proof of concept for high aspect ratio TSV manufacturing and new insights to improve 3D interconnect modeling for systems-in-package applications in the microwave regime

    Continuous deep reactive ion etching of tapered via holes for three-dimensional integration

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    A continuous SF6/O2 plasma process at room temperature has been used to etch tapered through-silicon vias using a DRIE-ICP tool. These features (10–100 µm in diameter) are aimed for applications in 3D integration and MEMS packaging. The effects of various process parameters such as O2 flow rate, platen bias, pressure and substrate temperature on the via profile (depth, slope angle and aspect ratio) development are investigated. The etching mechanism was also studied and x-ray photoelectron spectroscopy (XPS) analysis reveals a SiOx passivation layer of the order of ~2 nm on the via sidewall and a substantial temperature dependence. Both tapering and anisotropy of etching depend on this passivation layer formation. Finally, suitable tapered vias with an aspect ratio of ~5 and a slope angle of ~83° are obtained by properly balancing the etching regimes. In this condition, a maximum etch rate of 7 µm min-1 is achieved

    Silicon out-diffusion and aluminum in-diffusion in devices with atomic-layer deposited La2O3 thin films

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    The use of aluminum as an electrode in metal-insulator-semiconductor devices containing lanthanum oxide is impaired by unacceptable leakage current levels. Time of flight secondary ion mass spectroscopy depth profiling shows a significant amount of silicon out-diffusion from the substrate and aluminum in-diffusion towards the oxide. By using titanium nitride as the electrode, the silicon out-diffusion is suppressed, which improves the device performance. This indicates that, despite the larger coordination number of the lanthanum ions in the oxide, aluminum acts as a sink for silicon, thus driving the out-diffusion of silicon

    Plasma-assisted atomic layer deposition of TiN/Al2O3 stacks for metal-oxide-semiconductor capacitor applications

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    By employing plasma-assisted atomic layer deposition, thin films of Al2O3 and TiN are subsequently deposited in a single reactor at a single substrate temperature with the objective of fabricating high-quality TiN/Al2O3 / p-Si metal-oxide-semiconductor capacitors. Transmission electron microscopy and Rutherford backscattering spectroscopy analyses show well-defined interfaces and good Al2O3 stoichiometry, respectively. Electrical investigation of as-deposited test structures demonstrates leakage current densities as low as ~1 nA/cm2. Current-voltage (I-V) measurements demonstrate clear Fowler–Nordheim tunneling with an average TiN/Al2O3 barrier height of 3.3 eV. Steep Weibull distributions of the breakdown electric field around 7.5 MV/cm indicate good reliability of these devices. Time-dependent dielectric breakdown measurements demonstrate that the devices can sustain high operating electric fields of 3–4 MV/cm for the 10 year lifetime criterion. From capacitance-voltage (C-V) measurements, a dielectric constant (k) of 8.7± 0.1 was extracted for the Al2O3. No direct dependence on the deposition temperature was found in the range 350–400 °C, although the stack deposited at 400 °C demonstrates significantly lower C-V hysteresis of ~50 mV. A negative fixed oxide charge density of (9.6±0.2) x10 12 cm-2 was found to be present at the Al2O3 / p-Si interface. © 2009 American Institute of Physics
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