ABSTRACT Enabling Unrestricted Automated Synthesis of Portable Hardware Accelerators for Virtual Machines

The performance of virtual machines (e.g., Java Virtual Machines—JVMs) can be significantly improved when critical code sections (e.g., Java bytecode methods) are migrated from software to reconfigurable hardware. In contrast to the compile-once-run-anywhere concept of virtual machines, reconfigurable applications lack portability and transparent SW/HW interfacing: applicability of accelerated hardware solutions is often limited to a single platform. In this work, we apply a virtualisation layer that provides portable and seamless integration of hardware and software components to a JVM platform, making it capable of accelerating any Java bytecode method by using platform-independent hardware accelerators. The virtualisation layer not only improves portability of accelerated Java bytecode applications, but also supports runtime optimisations and enables unrestricted automated synthesis of arbitrary Java bytecode to hardware. To show the advantages and measure the limited overheads of our approach, we run several accelerated applications (handwritten and synthesised) on a real embedded platform. We also show our synthesis flow and discuss its advanced features fostered by the virtualisation layer

Automatic Topology-Based Identification Of Instruction-Set Extensions

this paper, specialisation is addressed through introduction of Ad-hoc Functional Units---special arithmetic/logic units added to a traditional architecture to perform domain-specific complex operation

Programming transparency and portable hardware interfacing: Towards generalpurpose reconfigurable computing

Despite enabling significant performance improvements, reconfigurable computing systems have not gained widespread acceptance: most reconfigurable computing paradigms lack (1) a unified and transparent programming model, and (2) a standard interface for integration of hardware accelerators. Ideally, programmers should code algorithms and designers should write hardware accelerators independently of any detail of the underlying platform. We argue that this lack of portability and uniform programming is among the main hindrances to the widespread acceptance of reconfigurable computing. To make reconfigurable computing globally more attractive, we suggest a transparent, portable, and hardware agnostic programming paradigm. For achieving software code and hardware design portability, platform-specific tasks are delegated to a system-level virtualisation layer that supports a chosen programming model—much in the same way platform details are hidden from users in classic general-purpose computers. Although an additional abstraction inherently brings overheads, we show that the involvement of the virtualisation layer also exposes optimisation potentials that compensate the overheads and bring additional speedups. As a case-study, we present a real design and implementation of some building blocks of such system and discuss the challenges involved in materialising the others.