20 research outputs found

    Model Order Reductiono of a nonlinear model of an electronic component: Application to a microchip activated by four sources

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    International audienceThe thermal comportment of a microchip with four heat sources made in a highly nonlinear material is considered, for various boundary conditions. To save computation time, a Reduced Order Model (ROM) is proposed to replace the original and high-order model. The ROM is highly reliable whatever the environment conditions and the activated source. Among the different reduction methods, a modal method is chosen. The non-linearity is taken into account via a simplified quadratic law. This leads to a simple formulation and a prompt numerical implementation

    Thermal modeling of multi-shape heating sources on n-layer electronic board

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    The present work completes the toolbox of analytical solutions that deal with resolving steady-state temperatures of a multi-layered structure heated by one or many heat sources. The problematic of heating sources having non-rectangular shapes is addressed to enlarge the capability of analytical approaches. Moreover, various heating sources could be located on the external surfaces of the sandwiched layers as well as embedded at interface of its constitutive layers. To demonstrate its relevance, the updated analytical solution has been compared with numerical simulations on the case of a multi-layered electronic board submitted to a set of heating source configurations. The comparison shows a high agreement between analytical and numerical calculations to predict the centroid and average temperatures. The promoted analytical approach establishes a kit of practical expressions, easy to implement, which would be cumulated, using superposition principle, to help electronic designers to early detect component or board temperatures beyond manufacturer limit. The ability to eliminate bad concept candidates with a minimum of set-up, relevant assumptions and low computation time can be easily achieved

    Thermo-Fluidic Characterizations of Multi-Port Compact Thermal Model of Ball-Grid-Array Electronic Package

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    International audienceThe concept of a single-input/multi-output thermal network was proposed by the Development of Libraries of Physical models for an Integrated design environment (DELPHI) consortium more than twenty years ago. The present work highlights the recent improvements made to efficiently derive a low-computing-effort model from a fully detailed numerical model and to characterize its performances. The temperature predictions of a deduced ball-grid-array (BGA) dynamic compact thermal model are compared to those of a realistic three-dimensional representation, including the large set of internal copper traces, as well as its board structure, which has been validated by experiment. The current study discloses a method for creating an amalgam reduced-order modal model (AROMM) for that electronic component family that allows the preservation of the geometry integrity and shortening scenarios computation. Typically, the AROMM method reduces by a factor of 600 the computation time needed to obtain the solution while keeping the error on the maximum temperature below 2%. Then, a meta-heuristic optimization is run to derive a more practical low-order resistor capacitor model that enables a thermo-fluidic analysis at the board level. Based on the calibrated numerical model, a novel AROMM method was investigated in order to address the chip behavior submitted to multiple heat sources. The first results highlight the capability to enforce a non-uniform power distribution on the upper surface of the silicon chip. Thus, the chip design layout can be analyzed and optimized to prevent thermal and reliability issues

    Analytical Thermal Modelling of Multilayered Active Embedded Chips into High Density Electronic Board

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    International audienceThe recent Printed Wiring Board embedding technology is an attractive packaging alternative that allows a very high degree of miniaturization by stacking multiple layers of embedded chips. This disruptive technology will further increase the thermal management challenges by concentrating heat dissipation at the heart of the organic substrate structure. In order to allow the electronic designer to early analyze the limits of the power dissipation, depending on the embedded chip location inside the board, as well as the thermal interactions with other buried chips or surface mounted electronic components, an analytical thermal modelling approach was established. The presented work describes the comparison of the analytical model results with the numerical models of various embedded chips configurations. The thermal behaviour predictions of the analytical model, found to be within ±10% of relative error, demonstrate its relevance for modelling high density electronic board. Besides the approach promotes a practical solution to study the potential gain to conduct a part of heat flow from the components towards a set of localized cooled board pads

    Analytical modeling of multi-layered printed circuit board using multi-stacked via clusters as component heat spreader

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    In order to help the electronic designer to early determine the limits of the power dissipation of electronic component, an analytical model was established to allow a fast insight of relevant design parameters of a multi-layered electronic board constitution. The proposed steady-state approach based on Fourier series method promotes a practical solution to quickly investigate the potential gain of multi-layered thermal via clusters. Generally, it has been shown a good agreement between the results obtained by the proposed analytical model and those given by electronics cooling software widely used in industry. Some results highlight the fact that the conventional practices for Printed Circuit Board modeling can be dramatically underestimate source temperatures, in particular with smaller sources. Moreover, the analytic solution could be applied to optimize the heat spreading in the board structure with a local modification of the effective thermal conductivity layers
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