A Many-Core Overlay for High-Performance Embedded Computing on FPGAs

In this work, we propose a configurable many-core overlay for high-performance embedded computing. The size of internal memory, supported operations and number of ports can be configured independently for each core of the overlay. The overlay was evaluated with matrix multiplication, LU decomposition and Fast-Fourier Transform (FFT) on a ZYNQ-7020 FPGA platform. The results show that using a system-level many-core overlay avoids complex hardware design and still provides good performance results.Comment: Presented at First International Workshop on FPGAs for Software Programmers (FSP 2014) (arXiv:1408.4423

Low power compressive sensing for hyperspectral imagery

Hyperspectral imaging instruments allow remote Earth exploration by measuring hundreds of spectral bands at very narrow channels of a given spatial area. The resulting hyperspectral data cube typically comprises several gigabytes. Such extremely large volumes of data introduces problems in its transmission to Earth due to limited communication bandwidth. As a result, the applicability of data compression techniques to hyperspectral images have received increasing attention. This paper, presents a study of the power and time consumption of a parallel implementation for a spectral compressive acquisition method on a Jetson TX2 platform. The conducted experiments have been performed to demonstrate the applicability of these methods for onboard processing. The results show that by using this low energy consumption GPU and integer data type is it possible to obtain real-time performance with a very limited power requirement while maintaining the methods accuracy.info:eu-repo/semantics/publishedVersio

DESIGN OF THE ALAMOUTI SCHEME FOR A MIMO RECEIVER AND ITS IMPLEMENTATION ON AN FPGA

This paper analyses the Alamouti scheme for different antenna configurations and different modulation types,namely BPSK, QPSK and QAM. All configurations were modeled and simulated in MATLAB. A MIMOreceiver for a 21 antenna configuration and BPSK modulation was implemented in a FPGA. The FPGAresults indicate that the Alamouti scheme is a good design option for hardware implementation of a MIMOreceiver. The receiver uses only about 10% of the resources of a medium-sized FPGA and achieves almost300 Msymbols per second

Smart embedded system for skin cancer classification

The very good results achieved with recent algorithms for image classification based on deep learning have enabled new applications in many domains. The medical field is one that can greatly benefit from these algorithms in order to help the medical professional elaborate on his/her diagnostic. In particular, portable devices for medical image classification are useful in scenarios where a full analysis system is not an option or is difficult to obtain. Algorithms based on deep learning models are computationally demanding; therefore, it is difficult to run them in low-cost devices with a low energy consumption and high efficiency. In this paper, a low-cost system is proposed to classify skin cancer images. Two approaches were followed to achieve a fast and accurate system. At the algorithmic level, a cascade inference technique was considered, where two models were used for inference. At the architectural level, the deep learning processing unit from Vitis-AI was considered in order to design very efficient accelerators in FPGA. The dual model was trained and implemented for skin cancer detection in a ZYNQ UltraScale+ MPSoC ZCU104 evaluation kit with a ZU7EV device. The core was integrated in a full system-on-chip solution and tested with the HAM10000 dataset. It achieves a performance of 13.5 FPS with an accuracy of 87%, with only 33k LUTs, 80 DSPs, 70 BRAMs and 1 URAM.info:eu-repo/semantics/publishedVersio

Stochastic Theater: Stochastic Datapath Generation Framework for Fault-Tolerant IoT Sensors

Stochastic Computing has emerged as a competitive computing paradigm that produces fast and simple implementations of arithmetic operations, while offering high levels of parallelism, and graceful degradation of the results when in the presence of errors. IoT devices are often operate under limited power and area constraints and subjected to harsh environments, for which, traditional computing paradigms struggle to provide high availability and fault-tolerance. Stochastic Computing is based on the computation of pseudo-random sequences of bits, hence requiring only a single bit per signal, rather than a data-bus. Notwithstanding, we haven’t witnessed its inclusion in custom computing systems. In this direction, this work presents Stochastic Theater, a framework to specify, simulate, and test Stochastic Datapaths to perform computations using stochastic bitstreams targeting IoT systems. In virtue of the granularity of the bitstreams, the bit-level specification of circuits, high-performance characteristics and reconfigurable capabilities, FPGAs were adopted to implement and test such systems. The proposed framework creates Stochastic Machines from a set of user defined arithmetic expressions, and then tests them with the corresponding input values and specific fault injection patterns. Besides the support to create autonomous Stochastic Computing systems, the presented framework also provides generation of stochastic units, being able to produce estimates on performance, resources and power. A demonstration is presented targeting KLT, typical method for data compression in IoT applications

Design of a Multiband Full-Rate Ultra-Wideband Receiver in FPGA

MultiBand OFDM (MB-OFDM) UWB [1] is a short-range promising wireless technology for high data rate communications up to 480 Mbps. In this paper, we have designed and implemented in an Virtex-6 FPGA an MB-OFDM UWB receiver for the highest data rate of 480 Mbps. To test the system, we have also implemented an MB-OFDM transmitter and an AWGN generator in VHDL and determined the bit error rates at the receiver running in an FPGA

DESIGN OF THE ALAMOUTI SCHEME FOR A MIMO RECEIVER AND ITS IMPLEMENTATION ON AN FPGA

This paper analyses the Alamouti scheme for different antenna configurations and different modulation types, namely BPSK, QPSK and QAM. All configurations were modeled and simulated in MATLAB. A MIMO receiver for a 21 antenna configuration and BPSK modulation was implemented in a FPGA. The FPGA results indicate that the Alamouti scheme is a good design option for hardware implementation of a MIMO receiver. The receiver uses only about 10% of the resources of a medium-sized FPGA and achieves almost 300 Msymbols per second

XtokaxtikoX: a stochastic computing-based autonomous cyber-physical system

This paper presents XtokaxtikoX, a fully autonomous cyber-physical system employing only stochastic arithmetic to perform computations on its data-path. Traditional implementations of stochastic computing systems benefit from fast and compact implementation of arithmetic operators, and high tolerance to errors, but depend heavily on the conversion between stochastic bitstreams and binary to implement many parts of the system. Furthermore, if a system requires any interaction with analog electronic components it must have additional ADC/DAC conversion circuitry, which further increases the complexity of the system. Conversely, the proposed work is able to directly translate analog signals into stochastic bitstreams, process the stochastic bitstreams and finally control analog actuators relying only on the information on the stochastic bitstreams. Details on the architectures to accomplish such functionality are presented as well as other stochastic arithmetic units. This paper also presents a small stochastic computing-based autonomous cyber-physical system implemented on a Cyclone IV FPGA to carry out a proof-of-concept.info:eu-repo/semantics/publishedVersio

Energy-efficient and real-time wearable for wellbeing-monitoring IoT system based on SoC-FPGA

Wearable devices used for personal monitoring applications have been improved over the last decades. However, these devices are limited in terms of size, processing capability and power consumption. This paper proposes an efficient hardware/software embedded system for monitoring bio-signals in real time, including a heart rate calculator using PPG and an emotion classifier from EEG. The system is suitable for outpatient clinic applications requiring data transfers to external medical staff. The proposed solution contributes with an effective alternative to the traditional approach of processing bio-signals offline by proposing a SoC-FPGA based system that is able to fully process the signals locally at the node. Two sub-systems were developed targeting a Zynq 7010 device and integrating custom hardware IP cores that accelerate the processing of the most complex tasks. The PPG sub-system implements an autocorrelation peak detection algorithm to calculate heart rate values. The EEG sub-system consists of a KNN emotion classifier of preprocessed EEG features. This work overcomes the processing limitations of microcontrollers and general-purpose units, presenting a scalable and autonomous wearable solution with high processing capability and real-time response.info:eu-repo/semantics/publishedVersio