Design, simulation and fabrication process of a SOI based 2-DOF vibratory gyroscope

This paper reports the design, simulation and fabrication process for a 2-DOF decoupled vibratory gyroscope. The structure is deliberately designed to have decoupled drive and sense mode oscillation to prevent unstable operation due to mechanical coupling, resulting in low zero rate out-put drift. At the same time, the closer the drive and sense resonances are, the higher is the angular rate resolution of the gyroscope. This can be achieved by using symmetric suspensions, but it results in reduced bandwidth. The proposed design has been configured to achieve about 150 Hz bandwidth, while ensuring decoupled operation of the drive and sense modes. Fem analysis has been carried out in CoventorWare® MEMS DESIGN software and simulation results show that the drive resonance occurs at 21.48 kHz and sense resonance at 21.63 kHz. The structure is designed for 15 µm this device layer. Fabrication of the design is proposed using DRIE and sacrificial release etching on SOI wafer. DRIE etching with high aspect ratio has been successfully carried out as desired and the results have been presented

Optimization, fabrication and characterization of a binary subwavelength cylindrical terahertz lens

A problem of optimizing the subwavelength microrelief of a binary cylindrical transmissive diffractive lens (DL) with a 300-mm focal length for a wavelength of λ=141 μm was considered. High-resistivity silicon was chosen as the DL substrate material. The angle of incidence of the illuminating beam was taken to be π/6. The optimization parameters were the height of the DL profile and the fill factor of the groove. The main goal of optimizing the design was to increase the diffraction efficiency of the lens. The DL diffraction efficiency was calculated using a Fourier mod method. The DL was fabricated by plasma-chemical etching (Bosch process) of the surface of a silicon substrate. The diffraction efficiency of the calculated lens was estimated to be 70%. However, a full-scale experiment showed the real efficiency to be much lower. These differences are related to both errors in the manufacturing process of the DL and non-ideal thickness parameters of the silicon wafers