SiC MOSFET with a self-aligned channel defined by shallow source-JFET implantation: A simulation study: Poster presented at International Conference on Silicon Carbide & Related Materials, September 29th - October 04th, 2019, Kyoto, Japan

Large cell density within power device is needed to obtain low on state resistance. Cell integration is limited by resolution and overlay accuracy of photolithography. Self-aligned processes, e.g. the self-aligned channel for SiC MOSFET using an over-oxidized polysilicon implantation mask, help to downsale the cell pitch and to increase the cell integration in the device

Process and design optimization of SiC MOSFET for low on-state resistance: Presentation held at Europe-Korea Conference on Science and Technology, EKC 2019, July 15-18, 2019, Vienna, Austria

Due to outstanding material parameters, silicon carbide (SiC) power devices offer much better electrical and thermal parameters than comparable silicon power devices in the same blocking voltage range. One of the key parameters of the power MOSFET is its on-state resistance, RDS(on) which has to be small, in order to obtain small power loss in a forward current conduction mode. In this work we present how process and design of SiC MOSFET can be optimized for the low on-state resistance. We distinguish different components of the total on-state resistance, which are the substrate and drift resistance; the channel, accumulation and JFET resistance; the source and contact resistance; and we show how each of these components has been minimized for our devices by the recent process developments. In addition to the process optimization, we discuss various ways to improve the SiC MOSFET design, which in general lead to larger cell integration and result in the lower on-state resistance of the device. These are for example a usage of a square elementary cell and an application of the short-channel technology. Results presented in this work are the experimental and simulation data collected during the academic, industrial and joint-research projects at Fraunhofer IISB

Channeling in 4H-SiC from an Application Point of View

During ion implantation into monocrystalline semiconductors, some of the implanted atoms will be deflected to crystal directions along which they may penetrate deeply into the crystal. We investigate such channeling effects for Al and N implantation into 4H-SiC by Monte Carlo simulations. The focus of the work is on the effects of channeling on doping profiles, the relevance for the net doping of typical power electronic devices, and the influence of scattering oxides

Dose Dependent Profile Deviation of Implanted Aluminum in 4H-SiC During High Temperature Annealing

The influence of the high temperature annealing on differently implanted Al profiles was investigated by SIMS measurements. Depending on the implanted dose and also depending on the local concentration a significant diffusion of the implanted Al was observed. Based on this results at least two necessary conditions of Al diffusion during high temperature annealing could be determined