68 research outputs found

    On the apparently fixed dispersion of size distributions

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    Probability density functions (PDF) of statistical distributions of cluster sizes N, where N is the number of particles in the cluster, often seem to have less freedom than expected from considering the number of degrees of freedom at the clusters' source. The full width at half maximum appears to be comparable to the average . Such a hidden symmetry is intriguing theoretically and practically impairs size selection towards narrow distributions. However, reviewing the example of Helium cluster beams demonstrates that the origin of the apparent fixing is the assumption that the distributions should be log-normal or exponential and the subsequent use of these functions to fit the data in n = ln(N) log-space. This demands more care when using parametric statistics. Alternatives to the traditionally employed fitting functions are discussed.Comment: 15 pages, preprint, to appear in Journal of Computational and Theoretical Nanoscienc

    gFEX, the ATLAS Calorimeter Level 1 Real Time Processor

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    The global feature extractor (gFEX) is a component of the Level-1Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 264 optical fibers with the data transferred at the 40 MHz LHC clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor FPGAs, monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA has been designed for testing and verification. The performance of Pre-prototype will be presented. We will also present the design of the gFEX board with Ultra-scale and discuss how it is being implemented. Although the board is being designed specifically for the ATLAS experiment, it is sufficiently generic that it could be used for fast data processing at other HEP or NP experiments

    Prototype Hardware Design and Testing of the Global Common Module for the Global Trigger Subsystem of the ATLAS Phase-II Upgrade

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    The high-luminosity large hadron collider (HL-LHC) will deliver more than ten times the integrated luminosity of the previous runs combined. Meeting its stricter requirements poses significant challenges to the Trigger and Data Acquisition (TDAQ) systems of the LHC experiments. Introduced in the framework of the ATLAS experiment's Phase-II Upgrade, the Global Trigger (GT) is a new subsystem which will perform offline-like algorithms on full-granularity calorimeter data. The implementation of the GT's functionality is firmware-focused and is composed of three layers: Multiplexing (or Data Aggregating), Global Event Processing, and demultiplexing interface to the Central Trigger Processor. Each layer will be composed of several, similar nodes, and will be hosted on replicas of identical hardware, the Global Common Module (GCM), an ATCA front board which will be adopted throughout the entire GT subsystem. This article proceeds from the TWEPP 2021 conference and presents the GCM hardware design, performed in 2020, and focuses on the results of its extensive testing performed in 2021

    Prototype Hardware Design and Testing of the Global Common Module (GCM) for the Global Trigger subsystem of the ATLAS Phase-II Upgrade

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    The HL-LHC will start operations in 2027, to deliver more than ten times the integrated luminosity of the LHC Runs 1-3 combined. Meeting these requirements poses significant challenges to the hardware design of the Trigger and Data Acquisition system. Global Trigger is a new subsystem, which will perform offline-like algorithms on full-granularity calorimeter data. The hardware implementation of the Global Trigger consists of three primary components: Multiplexer Processor layer, Global Event Processing layer, and demultiplexing Global-to-CTP Interface, all of which have identical hardware. The single Global Common Module hardware is implemented across the Global Trigger system

    Preparation of Pt–GO composites with high-number-density Pt nanoparticles dispersed uniformly on GO nanosheets

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    Pt–GO composites with high-number-density Pt nanoparticles dispersed uniformly on GO nanosheets were prepared using ethylene glycol as reducer at 180 °C. The nanoparticles had an average size of 12 nm with corners and edges on their surfaces. The composites had electrochemically active surface area of 31.7 m2 g−1 with a ratio (If/Ir=0.96) of the forward anodic peak current (If) to the reverse anodic peak current (Ir) in cyclic voltammetry curves, which is much higher than those of the reported Pt nanodendrites/reduced graphene oxide composites

    The Prototype Hardware Design and Test of Global Common Module for Global Trigger System of the ATLAS Phase II Upgrade

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    The HL-LHC [1] is expected to start operations in the middle of 2027, to deliver more than ten times the integrated luminosity of the LHC Runs 1-3 combined (up to 4000 fb−1). Meeting these requirements poses significant challenges to the hardware design of Trigger and Data Acquisition system. A baseline architecture, based on a single-level hardware trigger with a maximum rate of 1 MHz and 10 µs latency, is proposed for ATLAS. The hardware-based Level-0 Trigger system is composed of the Level-0 Calorimeter Trigger (L0Calo) [2], the Level-0 Muon Trigger (L0Muon) [3], the Global Trigger [4] and the Central Trigger sub-systems [4]. The Global Trigger is a new subsystem, which will perform offline-like algorithms on full-granularity calorimeter data. The calorimeter detector subsystems, FEXs [3], and MUCTPI [3] provide serial data for each bunch crossing to the MUX layer. These signals are then time-multiplexed [5] and the signals for a given event are transported to a single GEP node that executes the algorithms. The results are then sent to the CTP through the CTP Interface. The hardware implementation of the Global Trigger consists of three primary components: a Multiplexer Processor (MUX) layer, a GEP layer, and a demultiplexing Global-to-CTP Interface (CTP Interface), all of which have identical hardware composed of ATCA modules and FPGAs with many multi-gigabit transceivers. The single Global Common Module (GCM) hardware is implemented across the Global Trigger system, minimizing the complexity of the firmware and simplifying the system design and long-term maintenance

    Prospects and challenges of robotic hernia surgery in China: A narrative review

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    The Da Vinci surgical robotic system has revolutionized the field of robotic surgery and has become one of the most ubiquitous and recognized systems in the robotic surgery era. The rapid rise in China’s economy will provide crucial support for the promotion and application of robotic surgical systems in the country’s surgical field. At present, approximately 1.2 million inguinal hernia repairs are performed annually in China. However, many of these surgeries are performed via traditional open repair or laparoscopy methods. Using the purported benefits of robotic surgery system to benefit hernia patients should become a future direction for Chinese hernia surgeons
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