Catena: Collaboration, Cohesion and Continuity in Design Thinking and Making

In the interests of enhanced collaborative methods of design thinking, design communication, representation and rapid ideation, this article examines how a series of related activities and events, ‘catenated’ together, or forming a ‘catena’1 of design thinking, could create a clearer, more meaningful and more efficient portfolio of work for a beginning design studio. Drawing inspiration upon the operative verbs found in the work of sculptor Richard Serra,2 and using the artefacts from such activities to create generative design products and iterations across a semester schedule, this paper chronicles a series of active in-class collaborations over the course of a semester that allowed a cohort of students to connect a series of design projects together, rather than experience a series of unconnected learning objectives as was typical. References to learning theories including Jerome Bruner’s spiral curriculum and David Kolb’s theory of experiential learning3 informed the inquiry. Student feedback and reflection informed the areas of success and areas of improvement

Simulating the Effect of Modulated Tool-Path Chip Breaking On Surface Texture and Chip Length

One method for creating broken chips in turning processes involves oscillating the cutting tool in the feed direction utilizing the CNC machine axes. The University of North Carolina at Charlotte and the Y-12 National Security Complex have developed and are refining a method to reliably control surface finish and chip length based on a particular machine's dynamic performance. Using computer simulations it is possible to combine the motion of the machine axes with the geometry of the cutting tool to predict the surface characteristics and map the surface texture for a wide range of oscillation parameters. These data allow the selection of oscillation parameters to simultaneously ensure broken chips and acceptable surface characteristics. This paper describes the machine dynamic testing and characterization activities as well as the computational method used for evaluating and predicting chip length and surface texture