18 research outputs found

    A Fast RLWE-Based IPFE Library and its Application to Privacy-Preserving Biometric Authentication

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    With the increased use of data and communication through the internet and the abundant misuse of personal data by many organizations, people are more sensitive about their privacy. Privacy-preserving computation is becoming increasingly important in this era. Functional encryption allows a user to evaluate a function on encrypted data without revealing sensitive information. Most implementations of functional encryption schemes are too time-consuming for practical use. Mera et al. first proposed an inner product functional encryption scheme based on ring learning with errors to improve efficiency. In this work, we optimize the implementation of their work and propose a fast inner product functional encryption library. Specifically, we identify the main performance bottleneck, which is the number theoretic transformation based polynomial multiplication used in the scheme. We also identify the micro and macro level parallel components of the scheme and propose novel techniques to improve the efficiency using open multi-processing\textit{open multi-processing} and advanced vector extensions 2\textit{advanced vector extensions 2} vector processor. Compared to the original implementation, our optimization methods translate to 89.72%89.72\%, 83.06%83.06\%, 59.30%59.30\%, and 53.80%53.80\% improvements in the Setup\textbf{Setup}, Encrypt\textbf{Encrypt}, KeyGen\textbf{KeyGen}, and Decrypt\textbf{Decrypt} operations respectively, in the scheme for standard security level. Designing privacy-preserving applications using functional encryption is ongoing research. Therefore, as an additional contribution to this work, we design a privacy-preserving biometric authentication scheme using inner product functional encryption primitives

    Novel Three State Quantum Dot Gate Field Effect Transistor: Fabrication, Modeling and Applications

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    This dissertation presents the fabrication and circuit modeling of quantum dot gate field effect transistor (QDGFET) and quantum dot gate NMOS inverter (QDNMOS inverter). A conventional metal-oxide-semiconductor field effect transistor (MOSFET) conducts when the applied gate voltage is more than the threshold voltage of the device. Therefore, a MOSFET acts as a switch which cannot conduct below its threshold voltage and conducts beyond its threshold voltage. A quantum dot gate FET (QDGFET) produces three states in its transfer characteristic: OFF, ON and a low current saturation state known as intermediate state ( i ) because of the presence of quantum dots in the gate region. Self consistent solution of Schrodinger and Possion equations can explain the manifestation of the intermediate state between OFF and ON states of the QDGFET. ^ The long channel QDGFETs were fabricated on (100) p-type silicon wafer as well as on silicon-on-insulator wafer. Two different types of quantum dots (SiOx cladded - Si and GeOx cladded - Ge) are site-specifically self assembled on top of the gate 20 Å silicon dioxide gate insulator grown by thermal oxidation and II-VI ZnS-ZnMgS gate insulator by metal organic chemical vapor deposition (MOCVD) technique. In QDNMOS inverter, SiO x cladded -Si dots are self assembled on top of thermally grown silicon dioxide in the gate region of the QDGFETs in the inverter circuit. ^ This thesis also introduces the development of a circuit model of QDGFET based on Berkley Short Channel IGFET model (BSIM). Different ternary logic circuits based on QDGFET are also investigated in this thesis. Advanced circuit such as three-bit and six bit analog-to-digital converter (ADC) and digital-to-analog converter (DAC) were also simulated.

    Novel three-state quantum dot gate field effect transistor: fabrication, modeling and applications

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    The book presents the fabrication and circuit modeling of quantum dot gate field effect transistor (QDGFET) and quantum dot gate NMOS inverter (QDNMOS inverter). It also introduces the development of a circuit model of QDGFET based on Berkley Short Channel IGFET model (BSIM). Different ternary logic circuits based on QDGFET are also investigated in this book. Advanced circuit such as three-bit and six bit analog-to-digital converter (ADC) and digital-to-analog converter (DAC) were also simulated

    Instability of a plane Poiseuille flow bounded between inhomogeneous anisotropic porous layers

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    The linear stability analysis of a plane Poiseuille flow in a channel with anisotropic and inhomogeneous porous layers is performed. The effect of anisotropy and inhomogeneous permeability on the stability characteristics is addressed in detail. The stability characteristics of the anisotropy parameter (the ratio of permeability in the streamwise and the transverse direction) and the inhomogeneity function are presented in detailComment: 19 Pages, 11 figure

    Ternary static random access memory using quantum dot gate field‐effect transistor

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    Generation of four states in MOSFET for future multivalued logic circuit design

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