Enabling Fine Sample Rate Settings in DSOs with Time-Interleaved ADCs

The time-base used by digital storage oscilloscopes allows limited selections of the sample rate, namely constrained to a few integer submultiples of the maximum sample rate. This limitation offers the advantage of simplifying the data transfer from the analog-to-digital converter to the acquisition memory, and of assuring stability performances, expressed in terms of absolute jitter, that are independent of the chosen sample rate. On the counterpart, it prevents an optimal usage of the memory resources of the oscilloscope and compels to post processing operations in several applications. A time-base that allows selecting the sample rate with very fine frequency resolution, in particular as a rational submultiple of the maximum rate, is proposed. The proposal addresses the oscilloscopes with time-interleaved converters, that require a dedicated and multifaceted approach with respect to architectures where a single monolithic converter is in charge of signal digitization. The proposed time-base allows selecting with fine frequency resolution sample rate values up to 200 GHz and beyond, still assuring jitter performances independent of the sample rate selection

Modeling pentode-like characteristics of recessed-gate static induction transistor

A new analytical model is described for the pentode-like region of the characteristics of recessed-gate SIT structures. The model allows one to investigate the transition from saturating characteristics of long channel JFET's to nonsaturating behavior of SIT devices, taking into account realistic device geometr

SPICE modeling of power PiN diode using asymptotic waveform evaluation

A new power diode model is developed and implemented as a PSPICE subcircuit. The starting point of the new model is a continued-fraction expression in the Laplace domain of the carrier distribution in the base region. By truncating the continued-fraction expansion, lumped RC representations of the base region are easily obtained. In the time domain, this approach approximates of the exact behavior of the carrier distribution with a sum of decaying exponentials, obtained by matching the moments of the exact carrier distribution. The proposed model takes into account emitter recombination in the highly doped end regions, conductivity modulation in the base and the moving-boundaries effect during reverse-recovery, showing good convergence properties and fast simulation times. Comparisons between the results of the SPICE models and numerical device simulations are presente

Calculation of power diode reverse-recovery time for SPICE simulations

A new model for the calculation of power diode reverse-recovery time is described. The model takes into account the effect of emitter recombination and is easily incorporated into the PSPICE simulator. Comparisons between the proposed model and numerical simulation results are presente

A New SPICE model of power PiN diode based on asymptotic waveform evaluation

A new SPICE subcircuit model for power p-i-n diodes is proposed in this paper. The model is based on a moment-matching approximation of the ambipolar diffusion equation. It is shown that both the quasistatic model and the lumped charge model can be obtained as ion-order moment-matching approximations while new and more accurate models can be obtained from higher-order solutions. The proposed model takes into account emitter recombination in the highly doped end regions, conductivity modulation in the base and the moving-boundaries effect during reverse-recovery, showing good convergence properties and fast simulation times. Comparisons between the results of the SPICE model and both numerical device simulations and experimental results are presente

A new IGBT circuit model for SPICE simulation

A new compact model for power IGBTs is presented in this paper. In the proposed approach, the wide base bipolar transistor of the IGBT is modeled by using a Laplace-transform solution of the ambipolar diffusion equation. The obtained nonquasi-static BJT model is coupled with a proposed short-channel MOSFET model, to give the overall IGBT behavior. The developed IGBT model is implemented as a subcircuit in the PSPICE simulator, resulting in good accuracy and reduced CPU tim