Low power wireless sensor network for structural health monitoring of buildings using MEMS strain sensors and accelerometers

Within the MEMSCON project, a wireless sensor network was developed for structural health monitoring of buildings to assess earthquake damage. The sensor modules use custom-developed capacitive MEMS strain and 3D acceleration sensors and a low power readout application-specific integrated circuit (ASIC). A low power network architecture was implemented on top of an 802.15.4 media access control (MAC) layer in the 900MHz band. A custom patch antenna was designed in this frequency for optimal integration into the sensor modules. The strain sensor modules measure periodically or on-demand from the base station and obtain a battery lifetime of 12 years. The accelerometer modules record during an earthquake event, which is detected using a combination of the local acceleration data and remote triggering from the base station, based on the acceleration data from multiple sensors across the building. They obtain a battery lifetime of 2 years. The MEMS strain sensor and its readout ASIC were packaged in a custom package suitable for mounting onto a reinforcing bar inside the concrete and without constraining the moving parts of the MEMS strain sensor. The wireless modules, including battery and antenna, were packaged in a robust housing compatible with mounting in a building and accessible for maintenance such as battery replacement

Low power wireless sensor network for building monitoring

A wireless sensor network is proposed for monitoring buildings to assess earthquake damage. The sensor nodes use custom-developed capacitive MEMS strain and 3D acceleration sensors and a low power readout ASIC for a battery life of up to 12 years. The strain sensors are mounted at the base of the building to measure the settlement and plastic hinge activation of the building after an earthquake. They measure periodically or on-demand from the base station. The accelerometers are mounted at every floor of the building to measure the seismic response of the building during an earthquake. They record during an earthquake event using a combination of the local acceleration data and remote triggering from the base station based on the acceleration data from multiple sensors across the building. A low power network architecture was implemented over an 802.15.4 MAC in the 900MHz band. A custom patch antenna was designed in this frequency band to obtain robust links in real-world conditions

Overcoming I/O bottleneck in superconducting quantum computing: multiplexed qubit control with ultra-low-power, base-temperature cryo-CMOS multiplexer

Large-scale superconducting quantum computing systems entail high-fidelity control and readout of large numbers of qubits at millikelvin temperatures, resulting in a massive input-output bottleneck. Cryo-electronics, based on complementary metal-oxide-semiconductor (CMOS) technology, may offer a scalable and versatile solution to overcome this bottleneck. However, detrimental effects due to cross-coupling between the electronic and thermal noise generated during cryo-electronics operation and the qubits need to be avoided. Here we present an ultra-low power radio-frequency (RF) multiplexing cryo-electronics solution operating below 15 mK that allows for control and interfacing of superconducting qubits with minimal cross-coupling. We benchmark its performance by interfacing it with a superconducting qubit and observe that the qubit's relaxation times ($T_1$) are unaffected, while the coherence times ($T_2$) are only minimally affected in both static and dynamic operation. Using the multiplexer, single qubit gate fidelities above 99.9%, i.e., well above the threshold for surface-code based quantum error-correction, can be achieved with appropriate thermal filtering. In addition, we demonstrate the capability of time-division-multiplexed qubit control by dynamically windowing calibrated qubit control pulses. Our results show that cryo-CMOS multiplexers could be used to significantly reduce the wiring resources for large-scale qubit device characterization, large-scale quantum processor control and quantum error correction protocols.Comment: 16+6 pages, 4+1+5 figures, 1 tabl

Integrated Antennas for Microwave and Millimeter Wave Applications (Geïntegreerde antennes voor microgolf en millimetergolf toepassingen)

The arrival of portable wireless devices such as tablets and smartphones has caused an exponential growth in the demand for wireless capacity. The combination of integrated circuits and antennas allows the efficient use of existing channels for wireless communication and addition of previously unused channels at higher frequency. The goal of this thesis is the description of the most important technology parameters for the successful realization of integrated microwave and millimeter wave antenna solutions. Benefits and limitations for integrated antennas in existing microwave and future millimeter wave applications are described. The required antenna dimensions at the targeted frequency bands correspond most closely with chip package technologies. Three package technologies are investigated: organic multilayer substrates, low temperature cofired ceramic (LTCC) and thin-film on high-resistivity Silicon. The graphs presented allow the designer to select the most appropriate technology for a certain application. Two antenna elements were chosen for the analysis: a microstrip antenna and an open waveguide antenna. Both antennas are compatible with standard packaging technologies. They represent two antenna families with different characteristics for radiation pattern, impedance bandwidth, radiation efficiency and mutual coupling. The microstrip antenna is best suited for relative narrowband, low profile antennas on a low dielectric substrate. The open waveguide antenna is more wideband. It requires a thicker substrate with slightly higher dielectric constant (epsr=3-6) and a technology with sufficiently small via pitch. The influence of dielectric and conductive material losses on the radiation efficiency and interconnect loss is also investigated. A compact antenna package can only be realized for sufficiently high-frequency antennas. Applications at millimeter wave are compatible with the integration of an antenna array in the package. To avoid mismatch and high loss at millimeter wave frequencies, the active component should be assembled using flip-chip. The small dimension of the antenna package demands special attention since it can result in considerable coupling between antenna and chip and important ripple in the radiation pattern caused by diffraction at the substrate edges. Near-field data from an electromagnetic simulator allow the optimization of the integrated antenna design. Coplanar probes are used to accurately measure the impedance, radiation pattern and gain of the integrated antennas. The design and measurement procedures are illustrated with three examples: an antenna that covers several GNSS bands, a BGA antenna substrate for 5 GHz WLAN and phased array modules for high speed data communication at 60 GHz. Continued CMOS scaling will open up even higher frequency bands for low cost applications. Integrated antennas are an important building block for potential solutions at these frequencies.--------------------------------------------- Part I: Technology and design Antenna integration in microwave and millimeter wave packages --------------------------------------------- 1. Introduction 2. Technologies for integrated antenna packages 3. Design and characterization of integrated antenna packages --------------------------------------------- Part II: Applications Microwave and millimeter wave antenna modules --------------------------------------------- 4. Multiband antenna for GNSS handheld receivers 5. 5 GHz WLAN module with integrated patch antenna 6. Phased array modules for gigabit wireless communication at 60 GHz --------------------------------------------- 7. Conclusions A. Radiation efficiency of a planar antenna on a lossless dielectric B. Radiation pattern measurements List of publicationsnrpages: 260status: publishe

Genetic parameters and estimated breeding values of insect bite hypersensitivity in Belgian Warmblood horses

Genetic factors involved in susceptibility to insect bite hypersensitivity (IBH) in Belgian Warmblood horses (BWP) were investigated. Data relating to 3409 horses were collected using a questionnaire, administered to owners during sport competitions, BWP breeding days, breeder visits and after phone calls. Horses were classified as IBH-affected or unaffected, based on two ‘disease classifiers’: a lifetime record, based on owner information (life_status) and another based on whether or not the horse was showing clinical signs at the time of questioning (clin_status). IBH prevalence was 10% based on life_status, and 6.2% based on clin_status. The heritabilities estimated using threshold animal models varied from 0.65 to 0.78 on the underlying scale (0.18 to 0.26 on the observed scale). These research findings indicate that susceptibility to IBH is a heritable trait in BWP.publisher: Elsevier articletitle: Genetic parameters and estimated breeding values of insect bite hypersensitivity in Belgian Warmblood horses journaltitle: The Veterinary Journal articlelink: http://dx.doi.org/10.1016/j.tvjl.2015.08.012 content_type: article copyright: Copyright © 2015 Elsevier Ltd. All rights reserved.status: publishe

2x2 and 4x4 arrays of annular slot antennas in MCM-D technology fed by coplanar CPW networks

The paper reports on the first realisation of planar antenna arrays in the MCM-D technology fed by coplanar feeding networks built using CPW lines. 2 × 2 and 4 × 4 arrays of square annular slots designed to work in the Ka-band, around 26.8 GHz, are presented. The analysis was carried out both theoretically and experimentally. The results include the return loss, the radiation patterns and the antenna gain. The proposed arrays are compatible with driving electronics technology, enjoying high impedance bandwidth, low cross polarisation and high radiation efficiency. © IEE, 1999.status: publishe

Self-aligned flat ultra-thin chip package for flexible circuits

Purpose – Ultra-thin chip packaging (UTCP) is one of the flexible assembly technologies, by which thinned dies are encapsulated inside spin-coated dielectric films. For sake of higher density integration and bending stress suppression, two UTCPs can be stacked vertically. The purpose of this paper is to present an improved UTCP process flow to embed thinned chip in a symmetric dielectric sandwich for a flat topography. The UTCP flat top surface is suitable for metallization and further 3D stacking. Design/methodology/approach – In the new process, a central photosensitive polyimide film is introduced, in which a cavity is made for the embedded chip. The cavity is defined by lithography using the chip itself as a photo-mask. In this way, the cavity size and position is self-aligned to the chip. The chip thickness is compensated by the surrounding central layer, and a UTCP with flat topography (flat UTCP) is realized after top dielectric deposition. Findings – A batch of daisy chain test vehicles was produced. The feasibility of the process flow is verified by optical and electrical measurements. The result shows 100 percent yield, which is much better than previous work. A thermal humidity test showed no significant degradation of the flat UTCPs after 1,000 hours. Originality/value – High yield fabrication of flat UTCP is first shown. An innovative self-alignment lithography step is introduced to make a cavity in dielectric for chip thickness compensation by using the chip itself as a photo-mask

Conformal Phased Array for a Miniature Wireless Sensor Node

This paper reports on the design and fabrication of a fully integrated antenna beam steering concept for wireless sensor nodes. The conformal array circumcises four cube faces with a silicon core mounted on each face. Every silicon core represents a 2 by 1 antenna array with an antenna element consisting of a dipole antenna, a balun, and a distributed MEMS phase shifter. All these components are based on a single wafer process and designed to work at 17.2 GHz. First results of individual devices are reported and simulations of the whole concept are originally presented.status: publishe