4 research outputs found

    SCAR: Power Side-Channel Analysis at RTL-Level

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    Power side-channel attacks exploit the dynamic power consumption of cryptographic operations to leak sensitive information of encryption hardware. Therefore, it is necessary to conduct power side-channel analysis for assessing the susceptibility of cryptographic systems and mitigating potential risks. Existing power side-channel analysis primarily focuses on post-silicon implementations, which are inflexible in addressing design flaws, leading to costly and time-consuming post-fabrication design re-spins. Hence, pre-silicon power side-channel analysis is required for early detection of vulnerabilities to improve design robustness. In this paper, we introduce SCAR, a novel pre-silicon power side-channel analysis framework based on Graph Neural Networks (GNN). SCAR converts register-transfer level (RTL) designs of encryption hardware into control-data flow graphs and use that to detect the design modules susceptible to side-channel leakage. Furthermore, we incorporate a deep learning-based explainer in SCAR to generate quantifiable and human-accessible explanation of our detection and localization decisions. We have also developed a fortification component as a part of SCAR that uses large-language models (LLM) to automatically generate and insert additional design code at the localized zone to shore up the side-channel leakage. When evaluated on popular encryption algorithms like AES, RSA, and PRESENT, and postquantum cryptography algorithms like Saber and CRYSTALS-Kyber, SCAR, achieves up to 94.49% localization accuracy, 100% precision, and 90.48% recall. Additionally, through explainability analysis, SCAR reduces features for GNN model training by 57% while maintaining comparable accuracy. We believe that SCAR will transform the security-critical hardware design cycle, resulting in faster design closure at a reduced design cost

    Unlocking Hardware Security Assurance: The Potential of LLMs

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    System-on-Chips (SoCs) form the crux of modern computing systems. SoCs enable high-level integration through the utilization of multiple Intellectual Property (IP) cores. However, the integration of multiple IP cores also presents unique challenges owing to their inherent vulnerabilities, thereby compromising the security of the entire system. Hence, it is imperative to perform hardware security validation to address these concerns. The efficiency of this validation procedure is contingent on the quality of the SoC security properties provided. However, generating security properties with traditional approaches often requires expert intervention and is limited to a few IPs, thereby resulting in a time-consuming and non-robust process. To address this issue, we, for the first time, propose a novel and automated Natural Language Processing (NLP)-based Security Property Generator (NSPG). Specifically, our approach utilizes hardware documentation in order to propose the first hardware security-specific language model, HS-BERT, for extracting security properties dedicated to hardware design. To evaluate our proposed technique, we trained the HS-BERT model using sentences from RISC-V, OpenRISC, MIPS, OpenSPARC, and OpenTitan SoC documentation. When assessedb on five untrained OpenTitan hardware IP documents, NSPG was able to extract 326 security properties from 1723 sentences. This, in turn, aided in identifying eight security bugs in the OpenTitan SoC design presented in the hardware hacking competition, Hack@DAC 2022

    Comfortable and Sustainable Dorm Temperatures: Analyzing Legacy Heating Infrastructure and Improving Controls at Princeton University

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    The largest global energy end-use is heat, which accounts for nearly half of the world’s final energy consumption for 2021, according to the International Energy Agency (IEA). Particularly, buildings alone consume 46% of the heat energy for space and water heating, while there are new cost-effective and higher efficiency technologies readily available on the market. Previous research has found that 28.1% of the energy consumed in residential buildings is wasted due to inefficient heating system use and oversetting thermostats. Many papers have concluded a need for easier and more interactive controls with feedback. Princeton University is undertaking massive construction and renovation plans to establish highly-efficient campus systems and infrastructure as a repeatable, innovative, and sustainable model for the world and reach its goal of Net Zero Emissions by 2046. Specifically, there are campus construction projects for steam-to-hot-water conversion for building heating systems to use a geo-exchange thermal energy-based hot water supply. However, there remains legacy hot-water heating technology in use in some Undergraduate Housing buildings, which do not have upgradation plans for at least the next 30 years. The disparity in user operability as well as the efficacy and efficiency of different technologies used in residential buildings, leads to dissatisfaction, low engagement, inefficient user behavior, and overall, high energy usage. This project aims to study the students’ experiences with heating system technologies on campus, analyze the legacy hot water systems and design cost-effective methods of improving the analog controls' efficacy for better user satisfaction and comfort. Future work proposed includes features for internet connectivity, improving user interaction and feedback, and employing additional sensor inputs for an accurate, intelligent control system

    Cri du chat syndrome: A series of five cases

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    The cri du chat syndrome (CdCS) is a chromosomal deletion syndrome associated with a partial deletion of the short (p) arm of chromosome 5. We describe five children who were diagnosed to have CdCS by conventional cytogenetic analysis. The deletion was at 5p15 in four patients, whereas the fifth had a larger, more proximal deletion at 5p14. Fluorescence in situ hybridization (FISH) analysis confirmed the deletion of the CdCS critical region at 5p15.2. All five children had global developmental delay and dysmorphism with microcephaly. The other clinical features were variable. Since the clinical diagnosis of CdCS may not always be evident because of the phenotypic heterogeneity, cytogenetic analysis is necessary to establish the diagnosis and confirm that the deletion involves the CdCS critical region. This will enable early intervention which plays an important role in improving the outcome
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