A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications

High Efficiency Video Coding, the latest video standard, uses larger and variable-sized coding units and longer interpolation filters than [H.264 over AVC] to better exploit redundancy in video signals. These algorithmic techniques enable a 50% decrease in bitrate at the cost of computational complexity, external memory bandwidth, and, for ASIC implementations, on-chip SRAM of the video codec. This paper describes architectural optimizations for an HEVC video decoder chip. The chip uses a two-stage subpipelining scheme to reduce on-chip SRAM by 56 kbytes-a 32% reduction. A high-throughput read-only cache combined with DRAM-latency-aware memory mapping reduces DRAM bandwidth by 67%. The chip is built for HEVC Working Draft 4 Low Complexity configuration and occupies 1.77 mm[superscript 2] in 40-nm CMOS. It performs 4K Ultra HD 30-fps video decoding at 200 MHz while consuming 1.19 [nJ over pixel] of normalized system power.Texas Instruments Incorporate

A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications

The latest video coding standard High Efficiency Video Coding (HEVC) provides 50% improvement in coding efficiency compared to H.264/AVC, to meet the rising demand for video streaming, better video quality and higher resolutions. The coding gain is achieved using more complex tools such as larger and variable-size coding units (CU) in a hierarchical structure, larger transforms and longer interpolation filters. This paper presents an integrated circuit which supports Quad Full HD (QFHD, 3840×2160) video decoding for the HEVC draft standard. It addresses new design challenges for HEVC (“H.265”) with three primary contributions: 1) a system pipelining scheme which adapts to the variable-size largest coding unit (LCU) and provides a two-stage sub-pipeline for memory optimization; 2) unified processing engines to address the hierarchical coding structure and many prediction and transform block sizes in area-efficient ways; 3) a motion compensation (MC) cache which reduces DRAM bandwidth for the LCU and meets the high throughput requirements which are due to the long filters.Texas Instruments Incorporate

Hardware and protocols for authentication and secure computation

Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2018.Cataloged from PDF version of thesis.Includes bibliographical references (pages 149-162).The Internet of Things has resulted in an exponential rise in the number of embedded electronic devices. This thesis deals with ensuring the security of these embedded devices. In particular we focus our attention on two problems: first we look at how these devices can convince another of their identity i.e. authentication and second we look at how these devices and cloud servers can compute joint functions of their private inputs while revealing nothing but the computation results to the other i.e. secure computation. We start with the problem of counterfeit detection through electronic tagging. Physical access to electronic tags can be leveraged to mount side-channel and fault injection attacks. We design a new tagging solution that leverages ferro-electric capacitor based non volatile memory to addresses these issues. Next we note that resource constraints imposed by embedded devices often preclude the use of public-key cryptography. We address this issue through the development of a lightweight (10k-Gate) Elliptic Curve accelerator for the K-163 curves, which allows us to build a secure wireless-charging system that can block power from counterfeit and potentially dangerous chargers. Next we build upon these insights to develop a new authentication protocol which combines the leakage resilience and public-key authentication properties of our previous tagging solutions. We implement this bilinear pairing based protocol on a RISCV processor and demonstrate its practicality in an embedded environment through reuse of existing hardware accelerated cryptography for the TLS protocol. The final part of this thesis develops a framework for secure two-party computation. Our primary contribution is a judicious combination of homomorphic encryption and garbled circuits to substantially improve the performance of secure two-party computation. This allows us to present a practical solution to the problem of secure neural network inference, i.e. classifying your private data against a server's private model without either party sharing their data with the other. Our hybrid approach improves upon the state-of-art by 20-30 x in classification latency. Our final contributions are two efficient 2PC protocols that implement secure matrix multiplication and vector-OLE primitives. For both these tasks we improve concrete computation and communication performance over the state-of-art by an order of magnitude.by Chiraag Juvekar.Ph. D

Algorithms, architectures and circuits for low power HEVC codecs

Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.30Cataloged from PDF version of thesis.Includes bibliographical references (pages 81-84).In order to satisfy the demand for high quality video streaming, aggressive compression is necessary. High Efficiency Video Coding (HEVC) is a new standard that has been designed with the goal of satisfying this need in the coming decade. For a given quality, of video HEVC offers 2x better compression than existing standards. However, this compression comes at the cost of a commensurate increase in complexity. Our work aims to control this complexity in the context of real-time hardware video codecs. Our work focused on two specific areas: Motion Compensation Bandwidth and Intra Estimation. HEVC uses larger filters for motion compensation leading to a significant increase in decoder bandwidth. We present a novel motion compensation cache that reduces external memory bandwidth by 67% and power by 40%. The use of large, variable-sized coding units and new prediction modes results in a dramatic increase in the search space of a video encoder. We present novel intra estimation algorithms that substantially reduce encoder complexity with a modest 6% increase in BD-rate. These algorithms are co-designed with the hardware architecture allowing us to implement them within reasonable hardware constraints.by Chiraag Juvekar.S.M

A Keccak-Based Wireless Authentication Tag with per-Query Key Update and Power-Glitch Attack Countermeasures

Counterfeiting is a major problem plaguing global supply chains. While small low-cost tagging solutions for supply-chain management exist, security in the face of fault-injection [1] and side-channel attacks [2] remains a concern. Power glitch attacks [3] in particular attempt to leak key-bits by inducing fault conditions during cryptographic operation through the use of over-voltage and under-voltage conditions. This paper presents the design of a secure authentication tag with wireless power and data delivery optimized for compact size and near-field applications. Power-glitch attacks are mitigated through state backup on FeRAM based non-volatile flip-flops (NVDFFs) [4]. The tag uses Keccak [5] (the cryptographic core of SHA3) to update the key before each protocol invocation, limiting side-channel leakage to a single trace per key. Fig. 1 shows the complete system including the tag, reader, and backend server implemented in this work. Tags are seeded at manufacture and this initial seed is stored in the server database before a tag is affixed to an item. A wireless power and data transfer (WPDT) frontend harvests energy from the reader (433 MHz inductive link) and powers the on-chip authentication engine (AE). On startup the AE updates its key using a PRNG (seeded with the old key) and increments the key index. The AE then responds to the subsequent challenge, by encrypting the challenge under the new key. These challenge-response pairs can be validated by a trusted server to authenticate the tag. Additionally, the server can use the key-index to resynchronize with the tag in the event of packet loss.Denso (Firm)Texas Instruments Incorporate

Which is the most optimal technique to spare hippocampus?-Dosimetric comparisons of SCRT, IMRT, and tomotherapy

Aims: To evaluate current focal high precision radiotherapy (RT) techniques to spare hippocampi most optimally, in view of mounting clinical evidence to preserve neurocognition. Materials and Methods: Computed tomography/magnetic resonance imaging (CT/MRI) datasets of 10 patients with benign/low-grade brain tumors, treated with focal conformal RT were replanned with helical tomotherapy (Tomo), intensity-modulated radiotherapy (IMRT) with high definition multileaf collimator (HD-MLC), and forward planning stereotactic conformal radiotherapy (SCRT). The primary planning objective was to encompass 99% of planning target volume (PTV) by 95% of prescribed dose (54 Gy/30#). Assessments included target coverage (TC), homogeneity index (HI), and maximum (max) and minimum (min) dose. Hippocampal dose was assessed with mean, maximum, minimum, median dosem and various dose levels. Results: Mean V 95 for PTV coverage in Tomo, IMRT, and SCRT were 99.7, 99.4, and 98.3%, respectively. PTV coverage was significantly better in Tomo and IMRT compared to SCRT (P = 0.03). Tomotherapy (HI ≤ 0.06) and IMRT (HI ≤ 0.06) plans were more homogenous than SCRT (HI > 0.7) (P = 0.00). Right hippocampus mean dose with Tomo (20Gy) was 18.5% less than SCRT (30 Gy); but for left hippocampus, difference decreased to 3.3% (Tomo-32.2Gy and SCRT-34Gy). At 30% dose level, 9% more volume of right hippocampus was treated in IMRT and 20% in SCRT when compared to Tomo plan. At 80% dose, 6 and 12% more volumes were treated with IMRT and SCRT, respectively, in comparison to Tomo plan. For left hippocampus all three techniques were comparable. Conclusion: Tomotherapy and Linear accelerator (LINAC)-based IMRT achieved significantly better PTV coverage than forward planned SCRT. Tomo as compared to SCRT and IMRT plans showed trend towards significant sparing of the contralateral hippocampus, in eccentrically located tumors

Role of neoadjuvant chemotherapy in advanced carcinoma of the hypopharynx and larynx

Background: To assess the response rate and impact of neoadjuvant chemotherapy (NACT) in advanced carcinoma of the hypopharynx and larynx. Materials and Methods: This is a retrospective case series of 80 patients with locally advanced laryngopharynx carcinoma who received NACT from April 2010 to October 2011 at our tertiary care center. The patients received NACT either for achieving resectability or for organ preservation. Results: Majority of the patients (60%) had T4 a disease. Grade 3 and 4 neutropenia was seen in 18%, febrile neutropenia in 4%, mucositis in 4%, diarrhea in 5%, and vomiting in 3% patients. Resectability could be achieved in 34%, and larynx was preserved in 51% patients at a mean follow-up of 13 months. Conclusions: NACT was safe with acceptable toxicity. Majority of the patients who achieved resectability had oropharyngeal involvement. NACT followed by concurrent chemoradiotherapy could provide a high rate of organ preservation

A tertiary care experience with paclitaxel and cetuximab as palliative chemotherapy in platinum sensitive and nonsensitive in head and neck cancers

Background: The combination of paclitaxel and cetuximab (PaCe) has led to an encouraging response rate in Phase 2 setting with limited toxicity. The aim of our study was to assess the efficacy of this regimen in our setting in platinum sensitive and nonsensitive patients. Methods: This was a retrospective analysis of head and neck cancer patients treated with weekly PaCe as palliative chemotherapy between May 2010 and August 2014. The standard schedule of cetuximab along with 80 mg/m2 of weekly paclitaxel was administered till either disease progression or withdrawal of patient's consent. The toxicity and response were noted in accordance with CTCAE version 4.02 and RECIST version 1.1 criteria, respectively. The response rates between platinum sensitive and nonsensitive patients were compared by Chi-square test. Overall survival (OS) and progression-free survival (PFS) were estimated by Kaplan–Meier survival method and log-rank test was used for comparison. Cox proportional hazard model was used for identification of factors affecting PFS and OS. Results: One Hundred patients with a median age of 52 years (interquartile range: 46–56 years) were included. Forty-five patients (45%) were platinum insensitive, whereas 55 patients (55%) were platinum sensitive. In platinum insensitive patients and sensitive patients, the response rates were 38.5% and 22.2%, respectively (P = 0.104), whereas the symptomatic benefit in pain was seen in 89.5% and 71.7%, respectively (P = 0.044). The median PFS in platinum insensitive and sensitive patients were 150 and 152 days, respectively (P = 0.932), whereas the median OS was 256 days (95% confidence interval [95% CI]: 168.2–343.8 days) and 314 days (95% CI: 227.6–400.4 days), respectively (P = 0.23). Nineteen patients (19%) had grades 3–4 adverse events during chemotherapy. Conclusion: Weekly paclitaxel combined with cetuximab has promising efficacy and good tolerability in the palliative setting in advanced head and neck cancer in both platinum sensitive and insensitive patients