Decorrelating (DECOR) Transformations for Low-Power Adaptive Filters

Presented in this paper are decorrelating transformations (referred to as DECOR transformations) to reduce the power dissipation in adaptive filters. The coefficients generated by the weight update block in an adaptive filter are passed through a decorrelating block such that fewer bits are required to represent the coefficients. Thus, the size of the arithmetic units in the filter (F-block) is reduced thereby reducing the power dissipation. The DECOR transform is well suited for narrow-band filters because there is significant correlation between adjacent coefficients. In addition, the effectiveness of DECOR transforms increases with increase in the order of the filter and decrease in coefficient precision. Simulation results indicate reduction in power dissipation in the F-block ranging from 12% to 38% for filter bandwidths ranging from 0:15fs to 0:025fs (where fs is the sample rate). 1 INTRODUCTION The recent proliferation of portable, battery-powered, wireless communication syst..

Analytical Estimation of Transition Activity from Word-Level Signal Statistics

Presented here is an analytical methodology to determine the average signal activity, T , from the highlevel signal statistics, a statistical signal generation model, and the signal encoding. Simulation results for 16 bit signals generated via AR#1# and MA#1# models indicate an estimation error in T of less than 2#. The application of the proposed method to the estimation of T in DSP hardware is also explained. I. INTRODUCTION Power dissipation has become a critical design concern in recentyears driven by the emergence of mobile applications. Reliability concerns and packaging costs have made power optimization relevanteven for tethered applications. As system designers strivetointegrate multiple-systems on-chip, power dissipation has become an equally important parameter that needs to be optimized along with area and speed. Therefore, extensive researchinto various aspects of low-power system design is presently being conducted. These include power reduction techniques #3#5#; low-p..

Achievable bounds on signal transition activity

Abstract Transitions on high capacitance busses in VLSI systems result in considerable system power dissipation. Therefore, various coding schemes have been proposed in the literature to encode the input signal in order to reduce the number of transitions. In this paper we derive achievable lower and upper bounds on the expected signal transition activity. These bounds are derived via an information-theoretic approach in which symbols generated by a source p ossibly correlated with entropy rate H are c o ded with an average of R bits symbol. These results are applied to, 1. determine the activity reducing e ciency of di erent coding algorithms such as Entropy coding, Transition coding, and Bus-Invert coding, 2. bound the error in entropybased p ower estimation schemes, and 3. determine the lower-bound on the power-delay product. Two examples are p r ovided where t r ansition activity within 4 and 8 of the lower bound is achieved when blocks of 8 and 13 symbols respectively are c o ded at a time