8 research outputs found

    Effective viscoelastic plastic material modeling for faster and reliable calculations

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    Finite Element Simulations of highly integrated and large electronics packages with detailed elastic-plastic material modeling of thousands of solder balls are still challenging tasks on today's computation systems. The complex geometry and mesh and the usage of time-consuming creep laws for solder materials make it nearly impossible to calculate different geometries or process parameters. This paper describes a method to reduce the complexity of the mesh in the region of the solder balls and surrounding underfill with one simple block physically described as a viscoelastic material. Therefore a viscoelastic/plastic behavior of a complex unit cell was modeled in a temperature dependent harmonic frequency sweep or relaxation simulation. The reaction of the unit cell was utilized to synthesize the master curve, Prony coefficients and shift function to an effective material model. Finally, an error estimation of the unit cell approach was carried out. The results show that effective material approach can be used to cut down computation time significantly

    Experimental investigation and interpretation of the real time, in situ stress measurement during transfer molding using the piezoresistive stress chips

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    This paper describes a method used for experimental real-time monitoring of thermo-mechanical stress build-up during integrated circuit encapsulation. To detect the stress variations during molding, special stress measuring chips were employed. The working principle of the stress chip is based on the piezoresistive sensors embedded on the surface in a 6 by 6 matrix distribution. [1

    DoE simulations and measurements with the microDAC stress chip for material and package investigations

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    One major challenge for power and microelectronics system integration today is the assurance of reliability, very often mastered by a carefully tuned interplay of the still dissimilar materials that make up a package, first under optimized processing conditions, and then often under combined loading conditions. Therefore, not only during design but also during test and operation it would be desirable to in-situ monitor the stresses induced within a package onto a silicon die, as these thermo-mechanically induced stresses give rise to failure modes like solder fatigue, interface delamination and die cracking. In this vein the knowledge of the stress state would not only give much valued feedback to verify the simulations which are often used to predict lifetime based on material characterization. But it would also enable designers to study the behavior over time, revealing degradation mechanisms in the sense of a non-destructive failure analysis technique, so it could co ntribute to a better understanding of failure up to the point where the stress sensor could even be used as a lifetime monitor (health monitoring for electronic packages). The in-situ detection of failures in microelectronic packages in an experiment is still a big challenge. The reliability of most packages will be qualified by measuring the electrical resistance of daisy chain structures. The moment of failure in the electrical signals or the changes in the resistance are used for reliability or lifetime estimations. But the correlation of electrical resistance in the metallization and the packages or system reliability is very low. Extremely time-consuming investigation is needed to localize package failure after the experiment. Therefore, a chip, the MicroDAC stress chip, has been developed in a publicly funded project that is able to measure stress induced by thermo-mechanical loads. Different components of the stress tensor can be read out, as e.g. the in-plane stress difference and the in-pl

    Package Induced Stress Simulation and Experimental Verification

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    During and after packaging mechanical stresses and deformations can be imposed on the active MEMS structures, which can have a large impact on the device performance, operating range and reliability [1]. This effect can for example be assessed by coupled package and device modelling [2,3]. To be able to assess this impact for molded sensors, parametric package models have been set-up, which can describe and quantify the mechanical stresses occurring during molding, temperature change and long term operation. Stresses, which build up after molding of a device (i.e. after post-mold cure), are sensitive with regard to the properties of the packaging materials (i.e. CTE, Young's Modulus, glass transition temperature). For a reliable design, the question arises, which property has the largest impact and how the mechanical stresses can be reduced

    Measuring the mechanical relevant shrinkage during in-mold and post-mold cure with the stress chip

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    The integration of smart systems into hybrid structures is one of the challenges addressed by the project MERGE - the cluster of excellence on Technologies for Multifunctional Lightweight Structures. As a first example, a sensor system is integrated that is able to explore the thermo-mechanical conditions these systems will typically be exposed to. After briefly describing the sensor system, the paper focuses on the results of the encapsulation step as part of the fabrication process mounting the sensor chip on the test board. The sensor system measures the mechanical stresses during and after transfer molding. In particular, the in-plane components on the chip surface were recorded with high accuracy [1, 2]. Based on these informations, material parameters have been deduced by combining experimental and simulation methods within a Design of Experiment (DoE) study. During the encapsulation process, two sets of effects induce stress into the package simultaneously. On one hand, the coefficients of thermal expansion (CTE) lead to a thermal shrinkage of the materials during cooling from the curing to room temperature. On the other hand, the volume also decreases when the epoxy mold compound (EMC) is cured from its fluid into the final solid stage. This effect is called chemical cure shrinkage [3]. Separating both effects is really a challenge. The method shown in this paper allows quantifying the corresponding material parameters by combining the stress measurements with numerical parameter identification. Based on this method, the investigation on failure modes and reliability of the integrated smart systems can be improved

    Master curve synthesis by effective viscoelastic plastic material modeling

    No full text
    Finite Element Simulations of highly integrated and large electronics packages with detailed elastic-plastic material modeling of thousands of solder balls are still challenging tasks for today's computation systems. The complex geometry and mesh and the usage of time consuming creep laws for solder materials makes it nearly impossible to calculate different geometries or process parameters. This paper describes a method to reduce the complexity of the mesh in the region of the solder balls and surrounding underfill with one simple block physically described as a viscoelastic material. Therefore a viscoelastic/plastic behavior of a complex unit cell was modeled in a temperature dependent harmonic frequency sweep or relaxation simulation. The reaction of the unit cell was utilized to synthesize the master curve, Prony coefficients and shift function to an effective material model. Finally an error estimation of the unit cell approach was carried out

    Review of percolating and neck-based underfills with thermal conductivities up to 3 W/m-K

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    Heat dissipation from 3D chip stacks can cause large thermal gradients due to the accumulation of dissipated heat and thermal interfaces from each integrated die. To reduce the overall thermal resistance and thereby the thermal gradients, this publication will provide an overview of several studies on the formation of sequential thermal underfills that result in percolation and quasi-areal thermal contacts between the filler particles in the composite material. The quasi-areal contacts are formed from nanoparticles self-assembled by capillary bridging, so-called necks. Thermal conductivities of up to 2.5 W/m-K and 2.8 W/m-K were demonstrated experimentally for the percolating and the neck-based underfills, respectively. This is a substantial improvement with respect to a state-of-the-art capillary thermal underfill (0.7 W/m-K)
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