128 research outputs found

    Photoelectrochemical Etching and Removal of the Irregular Top Layer Formed on InP Porous Nanostructures

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    A photoelectrochemical (PEC) process was developed to remove the irregular top layer from InP porous nanostructures. After anodic formation of a nanopore array, the PEC process repeated in the same electrolyte under illumination. The etching rate of the pore surfaces was strongly associated with their structural properties, being greater in the irregular top layer. The irregular top layer was completely removed by monitoring and controlling the anodic photocurrents in the ramped bias mode

    Electrochemical Processes for Formation, Processing and Gate Control of III-V Semiconductor Nanostructures

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    This paper reviews recent efforts by authors’ group to utilize electrochemical processes for formation, processing and gate control of III-V semiconductor nanostructures. Topics include precise photo anodic and pulsed anodic etching of InP, formation of arrays of - oriented straight nanopores in n-type (001) InP by anodization and their possible applications, and macroscopic and nanometer-scale metal contact formation on GaAs, InP and GaN by a pulsed in-situ electrochemical process, which remarkably reduces Fermi level pinning. All the results indicate that electrochemical processes can achieve unique and important results which the conventional semiconductor technology cannot realize, anticipating their increased importance in future semiconductor nanotechnology and nanoelectronics

    Self-assembled formation of uniform InP nanopore arrays by electrochemical anodization in HCl based electrolyte

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    Attempts were made to optimize the electrochemical anodization process for the formation of high-density, regular and straight nanopore arrays on InP. The structure, shape and size of the pores were very sensitive to substrate orientations, electrolyte concentrations and anodization voltages. Among (1 1 1)A, (1 1 1)B and (0 0 1) substrate orientations, the most uniform and most straight nanopore arrays were obtained on (0 0 1) substrates at anodization voltages of 5–7 V by using 1.0–1.5 M HCl electrolyte containing HNO3. The pore depth could be controlled up to 80 μm by the anodization time

    Formation of High-Density GaAs Hexagonal Nano-wire Networks by Selective MBE Growth on Pre-patterned (001) Substrates

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    Attempts were made to grow high-density GaAs hexagonal nano-wire networks on (001) patterned substrates by selective molecular beam epitaxy (MBE). To form a hexagon, - and - directions were combined. By the growth of straight wire arrays in each direction, the growth mode, conditions and mechanism were investigated. The wire width was shown to be determined for both directions by the facet boundary planes resulting from the growth rate difference on different facets. By optimizing of growth condition, highly uniform and smoothly connected hexagonal nano-wire networks with a density of 3x10^8 cm^-2 were successfully formed

    Current transport and capacitance-voltage characteristics of GaAs and InP nanometer-sized Schottky contacts formed by in situ electrochemical process

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    The electrical properties of nanometer-sized Schottky contacts which were successfully formed on n-GaAs and n-InP substrates by a combination of an electrochemical process and an electron-beam (EB) lithography, were characterized both experimentally and theoretically. The detailed I–V measurements using a conductive AFM system showed nonlinear log I–V characteristics with large n value in range of 1.2–2.0 which cannot be explained by a standard 1D thermionic emission model. A computer simulation showed that this nonlinear characteristics can be explained by a new 3D thermionic emission model where Fermi-level pinning on the surrounding free surface modifies the potential distribution underneath the nano-contact. Calculation of C–V characteristics showed an extremely small change of the depletion layer width with bias due to the environmental Fermi-level pinning. On the other hand, it was also found that Fermi-level pinning at the metal–semiconductor interface itself is greatly reduced, resulting in a strong dependence of barrier height on the metal workfunction

    Cross-Sectional Evolution and Its Mechanism during Selective Molecular Beam Epitaxy Growth of GaAs Quantum Wires on (111)B Substrates

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    The mechanism of the cross-sectional evolution during the selective growth of GaAs quantum wires (QWRs) on (111)B-patterned substrates was studied in detail both experimentally and theoretically. For this purpose, growth experiments were carried out on -oriented wires by systematically changing growth conditions and pattern sizes. A detailed investigation on cross sections of wires has shown that the lateral wire width is determined by facet boundaries (FBs) within AlGaAs layers separating growth regions on top facets from those on side facets of mesa structures. FBs were found to be planar or curved, depending on initial pattern sizes and growth conditions. Computer simulation based on a phenomenological growth model was attempted, taking account of the facet-angle-dependent lifetime of adatoms. The simulation well reproduced the experimentally observed growth features including the evolution of FBs, indicating that the cross sections of wires grown on (111)B-patterned substrates are kinetically controlled by the pattern sizes and growth conditions

    Electrochemical Functionalization of InP Porous Nanostructures with a GOD Membrane for Amperometric Glucose Sensors

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    The electrochemical functionalization of n-type InP porous nanostructures and their feasibility for biochemical sensor applications were investigated. The porous structures have extremely large surface areas, i.e., over 10 m2/cm3, and superior electrical properties with conductive semiconductor substrates. As a first attempt at electrochemical functionalization, we successfully deposited a glucose oxidase (GOD) membrane onto an InP surface under an applied anodic bias of 1.2 V. With the addition of glucose, the response currents on the porous electrodes increased compared to those on planar InP electrodes due to their enlarged surface area. The sensitivity curves of the porous electrodes we used showed good linearity between the response currents and concentrations in a range from 0 to 5 mM.The electrochemical functionalization of n-type InP porous nanostructures and their feasibility for biochemical sensor applications were investigated. The porous structures have extremely large surface areas, i.e., over 10 m2/cm3, and superior electrical properties with conductive semiconductor substrates. As a first attempt at electrochemical functionalization, we successfully deposited a glucose oxidase (GOD) membrane onto an InP surface under an applied anodic bias of 1.2 V. With the addition of glucose, the response currents on the porous electrodes increased compared to those on planar InP electrodes due to their enlarged surface area. The sensitivity curves of the porous electrodes we used showed good linearity between the response currents and concentrations in a range from 0 to 5 mM

    Electrochemical Formation of Size-Controlled InP Nanostructures Using Anodic and Cathodic Reactions

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    A two-step electrochemical process using anodic and cathodic reactions was developed to form size-controlled nanostructures on InP(001) substrates. After anodic formation of a nanopore array, the cathodic decomposition process was applied to reduce the thickness of InP nanowalls. The etching rate of the nanowalls was extremely small and strongly dependent on the cathodic bias and crystal orientations of the wall surface. Wall thickness could be controlled in the range of 10–30 nm by changing the cathodic bias and processing time

    Fundamental Study of InP-Based Open-Gate Field-Effect Transistors for Application to Liquid-Phase Chemical Sensors

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    We prove with this paper that InP-based open-gate Field Effect Transistors (FETs) work well as liquid-phase chemical sensors. The open-gate FET clearly exhibited current saturation and a pinch-off behavior in the electrolyte, resulting in a rapid response to the gate bias applied via the electrolyte. A series of sensing measurements showed that the surface potential of the InP linearly changed with the pH values of the electrolytes in a pH range from 3.0 to 12.0. The pH sensitivity of the open-gate FETs depended on the ion species contained in the electrolyte. A Si3N4 layer was useful as an ion selective membrane for the InP open-gate FETs to improve the selectivity of H+ ions

    Hexagonal Binary Decision Diagram Quantum Circuit Approach for Ultra-Low Power III-V Quantum LSIs

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    A new approach for ultra-low-power LSIs based on quantum devices is presented and its present status and critical issues are discussed with a brief background review on the semiconductor nanotechnology. It is a hexagonal binary decision diagram (BDD) quantum logic circuit approach suitable for realization of ultra-low-power logic/memory circuits to be used in new applications such as intelligent quantum (IQ) chips embedded in the ubiquitous network environment. The basic concept of the approach, circuit examples showing its feasibility, growth of high density nanostructure networks by molecular beam epitaxy (MBE) for future LSI implementation, and the key processing issues including the device isolation issue are addressed
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