PACKER: a switchbox router based on conflict elimination by local transformations

PACKER is an algorithm for switchbox routing, based on a novel approach. In an initial phase, the connectivity of each net is established without taking the other nets into account. In general, this gives rise to conflicts (short circuits). In the second stage, the conflicts are removed iteratively using connectivity-preserving local transformations. They reshape a net by displacing one of its segments without disconnecting it from the net. The transformations are applied in a asystematic way using a scan line technique. The results obtained by PACKER are very positive: it solves all well-known benchmark example

Systematic methods for the computation of the directional fields and singular points of fingerprints

The first subject of the paper is the estimation of a high resolution directional field of fingerprints. Traditional methods are discussed and a method, based on principal component analysis, is proposed. The method not only computes the direction in any pixel location, but its coherence as well. It is proven that this method provides exactly the same results as the "averaged square-gradient method" that is known from literature. Undoubtedly, the existence of a completely different equivalent solution increases the insight into the problem's nature. The second subject of the paper is singular point detection. A very efficient algorithm is proposed that extracts singular points from the high-resolution directional field. The algorithm is based on the Poincare index and provides a consistent binary decision that is not based on postprocessing steps like applying a threshold on a continuous resemblance measure for singular points. Furthermore, a method is presented to estimate the orientation of the extracted singular points. The accuracy of the methods is illustrated by experiments on a live-scanned fingerprint databas

A Language and Toolset for the Synthesis and Efficient Simulation of Clock-Cycle-True Signal-Processing Algorithms

Optimal simulation speed and synthesizability are contradictory requirements for a hardware description language. This paper presents a language and toolset that enables both synthesis and fast simulation of fixed-point signal processing algorithms at the register-transfer level using a single system description. This is achieved by separate code generators for different purposes. Code-generators have been developed for fast simulation (using ANSI-C) and for synthesis (using VHDL). The simulation performance of the proposed approach has been compared with other known methods and turns out to be comparable in speed to the fastest among them

Implementation of a Combined OFDM-Demodulation and WCDMA-Equalization Module

For a dual-mode baseband receiver for the OFDMWireless LAN andWCDMA standards, integration of the demodulation and equalization tasks on a dedicated hardware module has been investigated. For OFDM demodulation, an FFT algorithm based on cascaded twiddle factor decomposition has been selected. This type of algorithm combines high spatial and temporal regularity in the FFT data-flow graphs with a minimal number of computations. A frequency-domain algorithm based on a circulant channel approximation has been selected for WCDMA equalization. It has good performance, low hardware complexity and a low number of computations. Its main advantage is the reuse of the FFT kernel, which contributes to the integration of both tasks. The demodulation and equalization module has been described at the register transfer level with the in-house developed Arx language. The core of the module is a pipelined radix-23 butterfly combined with a complex multiplier and complex divider. The module has an area of 0.447 mm2 in 0.18 ¿m technology and a power consumption of 10.6 mW. The proposed module compares favorably with solutions reported in literature

A Reconfigurable Tile-Based Architecture to Compute FFT and FIR Functions in the Context of Software-Defined Radio

Software-defined radio (SDR) is the term used for flexible radio systems that can deal with multiple standards. For an efficient implementation, such systems require appropriate reconfigurable architectures. This paper targets the efficient implementation of the most computationally intensive kernels of two significantly different standards, viz. Bluetooth and HiperLAN/2, on the same reconfigurable hardware. These kernels are FIR filtering and FFT. The designed architecture is based on a two-dimensional arrangement of 17 tiles. Each tile contains a multiplier, an adder, local memory and multiplexers allowing flexible communication with the neighboring tiles. The tile-base data path is complemented with a global controller and various memories. The design has been implemented in SystemC and simulated extensively to prove equivalence with a reference all-software design. It has also been synthesized and turns out to outperform significantly other reconfigurable designs with respect to speed and area

The Exploration of the Software-Defined Radio Concept by Prototyping Transmitter and Receiver Functions on a Digital Signal Processor

An ideal software radio is a system that performs analog-to-digital conversion directly after the antenna and then does all signal processing required in the digital domain on a platform that supports reconguration. Software-defined radio (SDR) is the term used for a more realistic approach in which part of the processing is still done in the analog domain. The use of mobile telephony has shown a spectacular growth in the last 10 years. A side eect of this rapid growth is an excess of mobile system standards. Therefore, the SDR concept is emerging as a potential pragmatic solution. It aims to build flexible radio systems, which are multipleservice, multi-standard, multi-band, re-congurable and reprogrammable, by software. First, this paper presents a global overview of SDR. Furthermore, it explains the implementation of an SDR transmitter and receiver that have been simplied for the purpose of illustration. The source code has been written in C and is running on a DSP evaluation module of Texas Instruments. The algorithms are based on a modied version of the China Wireless Telecommunication Standard (CWTS). The correctness of the implemented system has been verified and measurements of the bit error rate versus the bit-energy-to-noise-energy ratio are reported

A Reinforcement Learning Agent for Minutiae Extraction from Fingerprints

In this paper we show that reinforcement learning can be used for minutiae detection in fingerprint matching. Minutiae are characteristic features of fingerprints that determine their uniqueness. Classical approaches use a series of image processing steps for this task, but lack robustness because they are highly sensitive to noise and image quality. We propose a more robust approach, in which an autonomous agent walks around in the fingerprint and learns how to follow ridges in the fingerprint and how to recognize minutiae. The agent is situated in the environment, the fingerprint, and uses reinforcement learning to obtain an optimal policy. Multi-layer perceptrons are used for overcoming the difficulties of the large state space. By choosing the right reward structure and learning environment, the agent is able to learn the task. One of the main difficulties is that the goal states are not easily specified, for they are part of the learning task as well. That is, the recognition of minutiae has to be learned in addition to learning how to walk over the ridges in the fingerprint. Results of successful first experiments are presented