A novel approach of a fully inkjet printed SnO₂-based gas sensor on a flexible foil

International audienceIn recent years, printed and flexible gas sensors have quickly emerged as an innovative area of great interest because of their lightness and low cost. These flexible sensors can be easily integrated into autonomous systems for many applications such as smart food packaging and premature disease detection. In this paper, a novel approach was applied to manufacture a fully inkjet-printed gas sensor on a flexible polymeric foil. Platinum heater and gold electrodes were printed on the top side of the substrate, separated by a thin insulating layer of printed polyimide. An aqueous sol-gel process was adopted to synthesize nanosized SnO2-based sol that guaranty a crystallization at 350 °C, which is entirely consistent with the polyimide foil. Then, the sol was transformed into a stable ink and inkjet printed over the gold electrodes. The printability of different inks was optimized to ensure flawless ejection of droplets, and the complex physico-chemical interactions between the inks and different interfaces were controlled to get well-defined patterns with high resolution. Finally, electrical measurements of the printed sensor were performed to characterize the response and the sensitivity to different concentrations of ethanol, ammonia and carbon monoxide gases, at working temperature of 300 °C, in dry and wet air

Tailoring the Crystallographic Texture and Electrical Properties of Inkjet-printed Interconnects for Use in Microelectronics

International audienceIn this paper, silver nanoparticles with a mean diameter of 40 nm are studied for future applications in microelectronic devices. The enhanced diffusivity of nanoparticles is exploited to fabricate electrical interconnects at low temperature. Sintering condition has been tuned to tailor the grain size so that electrical resistivity can be lowered down to 3.4 µOhm∙cm. In this study, a {111}-textured gold thin film has been used to increase diffusion routes. The combined effects of the substrate crystalline orientation and the sintering condition have been demonstrated to have a significant impact on microstructures. In particular, a {111} fiber texture is developed above 300°C in printed silver only if the underlying film exhibits a preferential orientation. This condition appeared as essential for the efficiency of the gold wire-bonding process step. Thus, inkjet-printed interconnects show a prospective potential compared to conventional subtractive technique and offers new opportunities for low cost metallization in electronics packaging

Impact of variable frequency microwave and rapid thermal sintering on microstructure of inkjet-printed silver nanoparticles

International audienceThe effect of thermal profile on microstructure is studied in the frame of thin films deposited by inkjet-printing technology. The role of sintering temperature and thermal ramp is particularly investigated. Fast heating ramps exhibit coarse grains and pores, especially when a hybrid microwave curing is performed. This enhanced growth is attributed to the quick activation of densifying sintering regimes without undergoing thermal energy loss at low temperature. Microstructural evolution of various sintered inkjet-printed films is correlated with electrical resistivity and with the Young's modulus determined by nanoindentation. A strong link between those three parameters is highlighted during experiments giving credit to either a surface or a fully volumetric sintering, according to the process. Sintering is then mainly triggered by surface mass transfer or by grain boundary diffusion respectively. Silver thin-films with an electrical resistivity 4 to 5 times higher than the bulk has been reached in a few minutes and with a Young's modulus of 38 GPa

Chip integration using inkjet-printed silver conductive tracks reinforced by electroless plating for flexible board packages

International audienceInkjet-printing of interconnects is a maskless technology that has attracted great interest for printed electronics and packaging applications. Gemalto is expecting by motivated and developing skills and knowledge in this area to be at the forefront of European Security innovation and to answer to a continuous market pressure for higher security, lower cost and more secure complex systems. With an increasing need for flexible and mass deliveries of advanced secure personal devices such as: electronic passports, ID cards, driver licenses, other smartcards, e-documents and tokens. EMSE is seeing in these new developments an exciting brand new area of research situated between material science and electronics. In this frame, deposit and pattern creation for chip interconnection require specific behaviors which have to be scientifically understood to pursue industrial harmonious implementation. Both groups collaborated on inkjet-printed electronic routing from deposition to sintering and characterization, using collaborative means provided on Micro-PackS platform

Ultra-High Performance and Low-Cost Architecture of Discrete Wavelet Transforms

This work targets the challenging issue to produce high throughput and low-cost configurable architecture of Discrete wavelet transforms (DWT). More specifically, it proposes a new hardware architecture of the first and second generation of DWT using a modified multi-resolution tree. This approach is based on serializations and interleaving of data between different stages. The designed architecture is massively parallelized and sharing hardware between low-pass and high-pass filters in the wavelet transformation algorithm. Consequently, to process data in high speed and decrease hardware usage. The different steps of the post/pre-synthesis configurable algorithm are detailed in this paper. A modulization in VHDL at RTL level and implementation of the designed architecture on FPGA technology in a NexysVideo board (Artix 7 FPGA) are done in this work, where the performance, the configurability and the generic of our architecture are highly enhanced. The implementation results indicate that our proposed architectures provide a very high-speed data processing with low needed resources. As an example, with the parameters depth order equal 2, filter order equal 2, order quantization equal 5 and a parallel degree P = 16, we reach a bit rate around 3160 Mega samples per second with low used of logic elements (≈400) and logic registers (≈700)