15 research outputs found

    Heat Pumps, Wood Biomass and Fossil Fuel Solutions in the Renovation of Buildings: A Techno-Economic Analysis Applied to Piedmont Region (NW Italy)

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    The levelized cost of heat (LCOH) and the technical feasibility in the specific context of building construction or renovation are the major drivers of users’ choices for space heating and cooling solutions. In this work, the LCOH was assessed for the most diffused heating technologies in Piedmont (NW Italy): that is, fossil fuels (methane, heating oil and liquefied petroleum gas—LPG), wood biomass (wood logs and pellet) and heat pumps (air-source and ground-source), both in heating-only and in a heating and cooling configuration. A sensitivity analysis of the main LCOH drivers was performed to assess whether and how each technology is vulnerable to energy price and upfront cost changes. The results show that heat pumps are competitive against gas boilers, but they are heavily dependent on refurbishment incentives and penalized by the high electricity prices in Italy; on the other hand, wood biomasses are competitive even in the absence of incentives. The analysis confirmed that LPG and heating oil are no more competitive with renewable heating. Acting on the taxation of natural gas and electricity is key to making heat pumps the most economically convenient solution to cover the heating and cooling needs of buildings

    A Cryogenic Broadband Sub-1-dB NF CMOS Low Noise Amplifier for Quantum Applications

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    A cryogenic broadband low noise amplifier (LNA) for quantum applications based on a standard 40-nm CMOS technology is reported. The LNA specifications are derived from the readout of semiconductor quantum bits at 4.2 K, whose quantum information signals are characterized as phase-modulated signals. To achieve broadband input matching impedance and low noise figure, the gate-to-drain capacitance of the input transistor is exploited. The goal is to involve a resistive and capacitive load into the input impedance match of a common-source stage with source inductive degeneration. The capacitive load is created by an LC parallel tank whose resonant frequency is lower than the operating frequency. The achieved non-constant in-band equivalent capacitance is proven to be beneficial to input impedance matching. The resistive part of the load is provided by the transconductance of the cascode stage implicitly. An inductor is added to the gate of the cascode transistor to suppress its noise, and a transformer-based resonator with two resonant frequencies serves as the load of the first stage, thus extending the operating bandwidth. Design considerations for the cryogenic temperature operation of the LNA are proposed and analyzed. The LNA achieves a measured gain (S₂₁) of 35 ± 0.5 dB, return loss > 12 dB, and NF of 0.75-1.3 dB across the band (4.1-7.9 GHz), with 51.1-mW power consumption at room temperature, while it shows a measured gain of 42 ± 3.3 dB, and NF of 0.23-0.65 dB with 39-mW power consumption at 4.2 K between 4.6 and 8 GHz. To the best of our knowledge, this is the first report of a cryogenic LNA based on a bulk CMOS process working above 4 GHz showing sub-1-dB NF both at room and cryogenic temperatures

    Interfacing Qubits via Cryo-CMOS Front Ends

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    This work describes a basic interface between solid-state quantum bits (qubits) and classical environments. We describe a multiplexer, a circulator, and a low noise amplifier, designed for cryogenic temperature operation in a 40 nm CMOS technology node. The circuits take advantage of traditional design styles, such as transmission gates, passive LC filters and switches, and recent developments, such as differential noise cancelling with six-port transformers, while exploiting new cryogenic CMOS (cryo-CMOS) modeling for design and verification purposes

    Integrated multiplexed microwave readout of silicon quantum dots in a cryogenic CMOS chip

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    Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry [6]. However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy. Here we present a cryogenic integrated circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3x3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK. With the microwave resonators (6-8 GHz range), we show dispersive readout of the charge state of the QDs and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint. This modular architecture probes the limits towards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology

    A Fully-Integrated 40-nm 5-6.5 GHz Cryo-CMOS System-on-Chip with I/Q Receiver and Frequency Synthesizer for Scalable Multiplexed Readout of Quantum Dots

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    Quantum computing holds the promise to solve many of today's intractable problems. A solid-state quantum computer (QC) is generally made of an array of qubits implemented in one of many solid-state technologies and operating at deep-cryogenic temperatures (10-to-20mK). Silicon spin qubits are a promising candidate for scalable QCs, due to their size, long coherence times and potential for co-integration with the required classical control and readout electronics. Recently, semiconductor spin qubits have been demonstrated to operate at ~1K, thus accelerating the achievement of a compact QC [1]. Classical qubit control electronics has also progressed, with the demonstration of fully-integrated control of spin qubits [2] and transmons [3] implemented in a cryo-CMOS technology. While a cryo-CMOS integrated circuit has been co-integrated with quantum dots [4], fully-integrated readout electronics has not yet been addressed in the literature
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