DPA on quasi delay insensitive asynchronous circuits: formalization and improvement

The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a formal modeling of the electrical signature of QDI asynchronous circuits. The DPA is then applied to the formal model in order to identify the source of leakage of this type of circuits. Finally, a complete design flow is specified to minimize the information leakage. The relevancy and efficiency of the approach is demonstrated using the design of an AES crypto-processor.Comment: Submitted on behalf of EDAA (http://www.edaa.com/

CORDIC-based digital signal processing hardware algorithms

A survey of the new algorithm-architecture interaction arising from the use of vector rotations as primitive computational units is presented . After a thorough review of various features of the CORDIC algorithm, the full range of architectures allowing its implementation is examined. The CORDIC operator's versatility is illustrated through an overview of the numerous digital signal processing and linear algebra algorithms where it can be applied, with special emphasis on normalized variants of classical algorithins .Cet article présente une étude de synthèse sur une nouvelle interaction entre algorithmes et architectures résultant de l'utilisation de rotations vectorielles comme primitives de calcul . Après une présentation détaillée des différents aspects de l'algorithme CORDIC, la gamme des architectures possibles pour son implémentation est passée en revue. La puissance et la généralité de l'opérateur CORDIC sont illustrées par des exemples de nombreux algorithmes de traitement du signal et d'algèbre linéaire, en particulier toutes les versions normalisées d'algorithmes classiques, où il peut s'introduire

Ultrastructural Study of Yam Tuber as Related to Postharvest Hardness

Usually, parenchyma cell walls of monocotyledons do not develop secondary walls; however a few days after harvesting, the yam tuber of Dioscorea dumetorum starts to harden. Two or three weeks Iater, hardness is so pronounced that the tubers cannot be eaten, even after a long cooking time. Cytochemical studies using autofluorescence or some fluorescent dyes, such as phloroglucinol hydrochloride showed that the thin, and flexible cell walls of parenchyma tubers very quickly became fully lignified after harvesting. Ultrastructura 1 stud ies of the hardened ce 11 wa 11 s showed very thick secondary wa 11 s and very deep pit apertures. These secondary walls reacted strong ly with li gn in reactants such as potassium permanganate. The use of a radioactive (l \u27• C) ce llulose precursor, uri dine- 5\u27-d ipho sphateglucose, confirmed the formation of such secondary walls. The lignification started from the corners of the cells around intercellular spaces and proceeded along the walls

An image-based approach for the architectural modeling of past states

During the modelling process, 3D models are not easily conceived to support changes over time. On the contrary, for the description of cultural heritage, it is often necessary to display not only the actual state of buildings but also their previous states so to understand their modifications. The construction and structuring of spatio-temporal models of cultural heritage demand a double conceptual effort: on one side, 3D models must be reconstructed and structured in space according to architectural concepts; on the other one, such elements should follow the criteria of temporal decomposition. For this reason, links between structured elements should be established to keep track of changes over time. Moreover, only the current state can be reconstructed in a rigorous way using a combination of different 3D measurement techniques (such as laser scanning and photogrammetry); on the contrary, knowledge about past states is conditioned by missing elements, whose morphology and dating can reveal uncertain. For this reason, this paper describes a methodological approach to make use of the existing iconographic corpus for the analysis and the 3D management of building transformations. The aim is to establish a relation between the iconography used for the hypothetical reconstruction and the 3D representation that depends on it. As a result, 3D representations can be used like visualization systems capable of reflecting the amount of knowledge produced studying historic building

An Iconography-Based Modeling Approach for the Spatio-Temporal Analysis of Architectural Heritage

The study of historic buildings is usually based on the collection and analysis of iconographic sources such as photographs, drawings, engravings, paintings or sketches. This paper describes a methodological approach to make use of the existing iconographic corpus for the analysis and the 3D management of building transformations. Iconography is used for different goals. Firstly, it's a source of geometric information (image-based-modeling of anterior states); secondly, it's used for the re-creation of visual appearance (image-based texture extraction); thirdly it's a proof of the temporal distribution of shape transformations (spatio-temporal modeling); finally it becomes a visual support for the study of building transformations (visual comparison between different temporal states). The aim is to establish a relation between the iconography used for the hypothetical reconstruction and the 3D representation that depends on it. This approach relates to the idea of using 3D representations like visualization systems capable of reflecting the amount of knowledge developed by the study of a historic buildin

Asynchronism in a joint algorithm architecture perspective

Even if the design of asynchronous circuits reaches a certain level of maturity, they are still considered as a curiosity . However, some interesting industrial applications have been developed recently by Philips for pagers and by Sharp-Mitsubishi for set-top boxes . In this paper, the operating mode of asynchronous circuits is first presented, and compared with its synchronous counter-part . The properties and potentials of asynchronous circuits are then described as an introduction to the last part of the paper which aims at showing that the asynchronous operating mode associated with a description formalism based on communicating processes is a powerful tool to jointly design algorithms and architectures .Bien que leurs techniques de conception gagnent en maturité avec notamment l'apparition d'outils automatiques, et que le nombre des réalisations augmente, les circuits asynchrones constituent aujourd'hui encore une curiosité. Toutefois, Philips dans les pagers et Sharp-Mitsubishi dans les Set Top Box sont les premiers à intégrer des circuits asynchrones dans des équipements pré-industriels. Cet article présente dans un premier temps le principe de fonctionnement des circuits asynchrones en le situant par rapport à celui des systèmes synchrones. Les propriétés et potentiels généraux ainsi que les coûts d'implémentation inhérents à ce type de réalisation sont ensuite abordés. Ces deux premières parties introductives constituent les bases du dernier chapitre de l'article qui s'attache à montrer que la combinaison du mode de fonctionnement asynchrone et d'un formalisme de description basé sur les processus séquentiels communicants constitue un outil puissant pour l'étude et la conception conjointe des algorithmes et des architectures. Nous introduisons en particulier la notion de convergence algorithme-architecture qui traduit l'idée qu'algorithme et architecture peuvent être confondus en un seul modèle, décrit sous la forme d'un programme unique qui rend compte à la fois des propriétés fonctionnelles et structurelles de la spécification

Food-induced fatal anaphylaxis: from epidemiological data to general prevention strategies

BACKGROUND: Anaphylaxis hospitalisations are increasing in many countries, in particular for medication and food triggers in young children. Food-related anaphylaxis remains an uncommon cause of death, but a significant proportion of these are preventable. AIM: To review published epidemiological data relating to food-induced anaphylaxis and potential risk factors of fatal and/or near-fatal anaphylaxis cases, in order to provide strategies to reduce the risk of severe adverse outcomes in food anaphylaxis. METHODS: We identified 32 published studies available in MEDLINE (1966-2017), EMBASE (1980-2017), CINAHL (1982-2017), using known terms and synonyms suggested by librarians and allergy specialists. RESULTS: Young adults with a history of asthma, previously known food allergy particularly to peanut/tree nuts are at higher risk of fatal anaphylaxis reactions. In some countries, cow's milk and seafood/fish are also becoming common triggers of fatal reactions. Delayed adrenaline injection is associated with fatal outcomes, but timely adrenaline alone may be insufficient. There is still a lack of evidence regarding the real impact of these risk factors and co-factors (medications and/or alcohol consumption, physical activities, and mast cell disorders). CONCLUSIONS: General strategies should include optimization of the classification and coding for anaphylaxis (new ICD 11 anaphylaxis codes), dissemination of international recommendations on the treatment of anaphylaxis, improvement of the prevention in food and catering areas and, dissemination of specific policies for allergic children in schools. Implementation of these strategies will involve national and international support for ongoing local efforts in relationship with networks of centres of excellence to provide personalized management (which might include immunotherapy) for the most at-risk patients. This article is protected by copyright. All rights reserved

Functionnally asynchronous VLSI cellular array for morphological filtering of images

The design of a fine grain asynchronous VLSI cellular array is presented . It is shown how asynchronism can be exploited at both functional and structural levels . A joint algorithmic-architectural study has led to the fabrication of an integrated circuit including 16x16 processing elements .The data and control paths are designed using a standard-cell approach, combining CMOS and DCVSL (Differential Cascode Voltage Switch Logic) gates . The 800,000 transistor circuit enables real time morphological filtering of images.A travers la présentation de la conception d'un réseau cellulaire VLSI asynchrone à grain fin, il est montré comment la notion d'asynchronisme peut être exploitée à la fois au niveau fonctionnel et au niveau architectural. Une étude conjointe algorithme-architecture a abouti à la conception d'un circuit intégrant 16x16 processeurs élémentaires, Le flot de conception des chemins de données et de contrôle est basé sur une approche « cellules standard » qui combine des portes CMOS et DCVSL (Differential Cascode Voltage Switch Logic). Ce circuit d'environ 800.000 transistors permet de mettre en oeuvre en temps réel des algorithmes itératifs de filtrage morphologique par reconstruction

Etude spectrale de l'échantillonnage par traversée de niveaux

La tendance actuelle en microélectronique est d'intégrer des systèmes complexes sur une seule puce (« SoC » pour Sytems on chip): capteur, convertisseur analogique-numérique (CAN), traitement numérique du signal, transmission de données. Ces systèmes doivent être peu coûteux, de taille réduite, faible bruit et surtout peu consommateur d'énergie parce qu'il sont souvent alimentés par batteries. Parmi les étages cités, les CAN sont les plus difficiles à concevoir dans le respect du cahier des charges. Dans cette perspective, une nouvelle classe de convertisseur a été développée à partir de l'association de la technologie asynchrone et de l'échantillonnage non uniforme par traversée de niveaux. Le schéma d'échantillonnage est analysé pour les signaux périodiques mettant en évidence un repliement de spectre. Cependant l'étude de la reconstruction montre qu'un signal peut être reconstruit grâce à l'information portée par les intervalles de temps et ce malgré le repliement