High Current Density Vertical Nanowire TFETs With I&#x2086;&#x2080; &#x003E; 1 <italic>&#x03BC;</italic>A/<italic>&#x03BC;</italic>m

We present experimental data for a vertical, 22-nm-diameter InAs/(In)GaAsSb nanowire Tunnel Field-Effect Transistor that exhibits the highest reported I60 of $1.2~\mu \text{A}/\mu \text{m}$ , paving the way for low power applications. The transistor reaches a minimum subthreshold swing of 43 mV/dec at $\text{V}_{DS}$ &#x003D; 300 mV with a sub-60 mV/dec operation over a wide current range. Combined with a high transconductance of $205~\mu \text{S}/\mu \text{m}$ , the ON-current for the same device is $18.6~\mu \text{A}/\mu \text{m}$ at $\text{V}_{DS}$ &#x003D; 300 mV for $\text{I}_{OFF}$ of 1 nA/ $\mu \text{m}$

Source Design of Vertical III&#x2013;V Nanowire Tunnel Field-Effect Transistors

We systematically fabricate devices and analyze data for vertical InAs/(In)GaAsSb nanowire tunnel field-effect transistors (TFETs), to study the influence of source dopant position and level on their device performance. The results show that delaying the introduction of dopants further in the GaAsSb source segments improved the transistor metrics (subthreshold swing (SS) and the on-current performance), due to the formation of a nid-InAsSb segment. The devices display a minimum SS of 26 mV/dec and on-current of $10.2 ~\mu \text{A}/\mu \text{m}$ at $V_{\text {DS}}$ of 300 mV. The performance of devices were improved further by optimizing the doping levels which led to record subthermal current of $1.2 ~\mu \text{A}/\mu \text{m}$ and transconductance of $205 ~\mu \text{S}/\mu \text{m}$ at $V_{\text {DS}}$ of 500 mV

Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs

We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of 1~μ s. We find that self-heating is a limiting factor for device performance